GPU共享内存Bank 4Byte or 8Byte模式查询和修改的cuda API。
Access Mode Configuration
默认情况是4-byte模式,可以用下面的API来查看:
cudaError_t cudaDeviceGetSharedMemConfig(cudaSharedMemConfig *pConfig);
返回结果放在pConfig中,其结果可以是下面两种:
cudaSharedMemBankSizeFourByte
cudaSharedMemBankSizeEightByte
可以使用下面的API来设置bank的大小:
cudaError_t cudaDeviceSetSharedMemConfig(cudaSharedMemConfig config);
bank的配置参数如下三种:
cudaSharedMemBankSizeDefault
cudaSharedMemBankSizeFourByte
cudaSharedMemBankSizeEightByte
cuda头文件中的API说明
/**
* \brief Sets the shared memory configuration for the current device.
*
* On devices with configurable shared memory banks, this function will set
* the shared memory bank size which is used for all subsequent kernel launches.
* Any per-function setting of shared memory set via ::cudaFuncSetSharedMemConfig
* will override the device wide setting.
*
* Changing the shared memory configuration between launches may introduce
* a device side synchronization point.
*
* Changing the shared memory bank size will not increase shared memory usage
* or affect occupancy of kernels, but may have major effects on performance.
* Larger bank sizes will allow for greater potential bandwidth to shared memory,
* but will change what kinds of accesses to shared memory will result in bank
* conflicts.
*
* This function will do nothing on devices with fixed shared memory bank size.
*
* The supported bank configurations are:
* - ::cudaSharedMemBankSizeDefault: set bank width the device default (currently,
* four bytes)
* - ::cudaSharedMemBankSizeFourByte: set shared memory bank width to be four bytes
* natively.
* - ::cudaSharedMemBankSizeEightByte: set shared memory bank width to be eight
* bytes natively.
*
* \param config - Requested cache configuration
*
* \return
* ::cudaSuccess,
* ::cudaErrorInvalidValue
* \notefnerr
* \note_init_rt
* \note_callback
*
* \sa ::cudaDeviceSetCacheConfig,
* ::cudaDeviceGetCacheConfig,
* ::cudaDeviceGetSharedMemConfig,
* ::cudaFuncSetCacheConfig,
* ::cuCtxSetSharedMemConfig
*/
在头文件的函数说明中有一点要注意,其启动不同的kernel之间修改bank配置会有一个隐式的device同步点。
* Changing the shared memory configuration between launches may introduce
* a device side synchronization point.