Sim/circuit10
This is a sequential circuit. The circuit consists of combinational logic and one bit of memory (i.e., one flip-flop). The output of the flip-flop has been made observable through the output state.
Read the simulation waveforms to determine what the circuit does, then implement it.
这是一个时序电路。该电路由组合逻辑和一位存储器(例如一个触发器)组成。触发器的输出可以通过输出信号state来观察。读取仿真波形以确定电路的功能,然后实现它。
module top_module (
input clk,
input a,
input b,
output q,
output state );
always @(posedge clk) begin
if(!a&&!b)
state<=1'b0;
else if(a&&b)
state<=1'b1;
else state<=state;
end
assign q=state?(~a^b):(a^b);
endmodule