uboot 2414.04 移植到S3C2440（start.s）

The U-Boot source code is maintained in the git repository at
git://www.denx.de/git/u-boot.git ; you can browse it online at
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=summary


The "snapshot" links on this page allow you to download tarballs of
any version you might be interested in. Official releases are also
available for FTP download from the ftp://ftp.denx.de/pub/u-boot/
directory.

从这里可以下载uboot的源代码
Pre-built (and tested) images are available from
ftp://ftp.denx.de/pub/u-boot/images/

一 uboot启动过程和编译过程在这里就不详细讲了，可以参考一下前面几篇文章。

二 uboot的移植步骤（移植过程中要修改的文件）

If the system board that you have is not listed, then you will need
to port U-Boot to your hardware platform. To do this, follow these
steps:


1.  Add a new configuration option for your board to the toplevel
    "boards.cfg" file, using the existing entries as examples.
    Follow the instructions there to keep the boards in order. 

   依照boards.cfg 修改其内容，保持顺序移植
2.  Create a new directory to hold your board specific code. Add any
    files you need. In your board directory, you will need at least
    the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".

创建新的目录，保存目标板相关的文件
3.  Create a new configuration file "include/configs/<board>.h" for
    your board

创建新的头文件
3.  If you're porting U-Boot to a new CPU, then also create a new
    directory to hold your CPU specific code. Add any files you need.

如果我们打算移植到新的CPU中就要相关文件（一般我们不需要）

下面就是编译调试过程了。
4.  Run "make <board>_config" with your new name.
5.  Type "make", and you should get a working "u-boot.srec" file
    to be installed on your target system.
6.  Debug and solve any problems that might arise.
    [Of course, this last step is much harder than it sounds.]

三， 移植的目的

  1 使得uboot读写nand flash的功能；

  2 包含menu菜单，支持dnw功能，如韦东山视频所示：

  3 支持DM9000网卡驱动，能进行网络下载

 4 uboot能引导S3C2440启动

四， 移植

 

  1， 打开"boards.cfg，仿照smdk2410修改相关文件；

   增加MYS3C2440 相关文件。

Active  arm         arm920t        s3c24x0     samsung         -                   smdk2410                             -                                                                                                                                 David Müller <d.mueller@elsoft.ch>
Active  arm         arm920t        s3c24x0     samsung         -                   MYS3C2440                             -                                                                                                                                 zhuzhiqi <zhuzhiqi@tju.edu.cn>

2 进入board/samsung

  mkdir MYS3C2440

 cp   smdk2410/*  MYS3C2440/

cd  MYS3C2440/

mv smdk2410.c MYS3C2440.c

vim Makefile

把smdk2410.o 改为MYS3C2440.c

3 进入include/configs/

cp smdk2410.h MYS3C2440.h （头文件中的内容并未修改！)

此时回到uboot顶级目录输入

make MYS3C2440_config

make 

此时是可以编译通过的，由于我们并没有进行相关的修改，得到的二进制文件只适用于smdk2410.

4 准备工作已经完成，下面来修改代码，完成移植

stage1 要完成的工作：

a 设置中断向量表 

b 进入SVCD模式

c 关看门狗

d 屏蔽所有中断

e 初始化SDRAM

f 设置栈，初始化时钟

g 代码复制，Flash到SDRAM

h 清bss（使得未初始化的数据均为0）

i 调用-main()或者（start_armboot 这是以前版本的）。

1）首先进入start.s 修改相关代码 （代码修改参考前面的文章，这里仅标记出与以前有差别的地方）

/*
 *  armboot - Startup Code for ARM920 CPU-core
 *
 *  Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
 *  Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
 *  Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
 *
 * SPDX-License-Identifier: GPL-2.0+
 */


#include <asm-offsets.h>
#include <common.h>
#include <config.h>


/*
 *************************************************************************
 *
 * Jump vector table as in table 3.1 in [1]
 *
 *************************************************************************
 */




.globl _start
_start: b start_code
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq


_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq


.balignl 16,0xdeadbeef




/*
 *************************************************************************
 *
 * Startup Code (called from the ARM reset exception vector)
 *
 * do important init only if we don't start from memory!
 * relocate armboot to ram
 * setup stack
 * jump to second stage
 *
 *************************************************************************
 */


#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de


/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif


/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de


/*
 * the actual start code
 */


start_code:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr, r0


#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
/*
* relocate exception table
*/
ldr r0, =_start
ldr r1, =0x0
mov r2, #16
copyex:
subs r2, r2, #1
ldr r3, [r0], #4
str r3, [r1], #4
bne copyex
#endif


#ifdef CONFIG_S3C24X0
/* turn off the watchdog */


# if defined(CONFIG_S3C2400)
#  define pWTCON 0x15300000
#  define INTMSK 0x14400008/* Interrupt-Controller base addresses */
#  define CLKDIVN 0x14800014/* clock divisor register */
#else
#  define pWTCON 0x53000000
#  define INTMSK 0x4A000008/* Interrupt-Controller base addresses */
#  define INTSUBMSK 0x4A00001C
#  define CLKDIVN 0x4C000014/* clock divisor register */
# endif


ldr r0, =pWTCON
mov r1, #0x0
str r1, [r0]


/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif


/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
#endif /* CONFIG_S3C24X0 */


/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif


bl _main （这里与以前不同，跳转到了一个-main的地方。）


/*------------------------------------------------------------------------------*/


.globl c_runtime_cpu_setup
c_runtime_cpu_setup:


mov  pc, lr


/*
 *************************************************************************
 *
 * CPU_init_critical registers
 *
 * setup important registers
 * setup memory timing
 *
 *************************************************************************
 */




#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0/* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0/* flush v4 TLB */


/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300@ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087@ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002@ set bit 2 (A) Align
orr r0, r0, #0x00001000@ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0


/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr


bl lowlevel_init


mov lr, ip
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */


/*
 *************************************************************************
 *
 * Interrupt handling
 *
 *************************************************************************
 */


@
@ IRQ stack frame.
@
#define S_FRAME_SIZE 72


#define S_OLD_R0 68
#define S_PSR 64
#define S_PC 60
#define S_LR 56
#define S_SP 52


#define S_IP 48
#define S_FP 44
#define S_R10 40
#define S_R9 36
#define S_R8 32
#define S_R7 28
#define S_R6 24
#define S_R5 20
#define S_R4 16
#define S_R3 12
#define S_R2 8
#define S_R1 4
#define S_R0 0


#define MODE_SVC 0x13
#define I_BIT 0x80


/*
 * use bad_save_user_regs for abort/prefetch/undef/swi ...
 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
 */


.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12}@ Calling r0-r12
ldr r2, IRQ_STACK_START_IN
ldmia r2, {r2 - r3}@ get pc, cpsr
add r0, sp, #S_FRAME_SIZE@ restore sp_SVC


add r5, sp, #S_SP
mov r1, lr
stmia r5, {r0 - r3}@ save sp_SVC, lr_SVC, pc, cpsr
mov r0, sp
.endm


.macro irq_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12}@ Calling r0-r12
add r7, sp, #S_PC
stmdb r7, {sp, lr}^@ Calling SP, LR
str lr, [r7, #0]@ Save calling PC
mrs r6, spsr
str r6, [r7, #4]@ Save CPSR
str r0, [r7, #8]@ Save OLD_R0
mov r0, sp
.endm


.macro irq_restore_user_regs
ldmia sp, {r0 - lr}^@ Calling r0 - lr
mov r0, r0
ldr lr, [sp, #S_PC]@ Get PC
add sp, sp, #S_FRAME_SIZE
/* return & move spsr_svc into cpsr */
subs pc, lr, #4
.endm


.macro get_bad_stack
ldr r13, IRQ_STACK_START_IN@ setup our mode stack


str lr, [r13]@ save caller lr / spsr
mrs lr, spsr
str lr, [r13, #4]


mov r13, #MODE_SVC@ prepare SVC-Mode
@ msr spsr_c, r13
msr spsr, r13
mov lr, pc
movs pc, lr
.endm


.macro get_irq_stack@ setup IRQ stack
ldr sp, IRQ_STACK_START
.endm


.macro get_fiq_stack@ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm


/*
 * exception handlers
 */
.align  5
undefined_instruction:
get_bad_stack
bad_save_user_regs
bl do_undefined_instruction


.align 5
software_interrupt:
get_bad_stack
bad_save_user_regs
bl do_software_interrupt


.align 5
prefetch_abort:
get_bad_stack
bad_save_user_regs
bl do_prefetch_abort


.align 5
data_abort:
get_bad_stack
bad_save_user_regs
bl do_data_abort


.align 5
not_used:
get_bad_stack
bad_save_user_regs
bl do_not_used


#ifdef CONFIG_USE_IRQ


.align 5
irq:
get_irq_stack
irq_save_user_regs
bl do_irq
irq_restore_user_regs


.align 5
fiq:
get_fiq_stack
/* someone ought to write a more effiction fiq_save_user_regs */
irq_save_user_regs
bl do_fiq
irq_restore_user_regs


#else


.align 5
irq:
get_bad_stack
bad_save_user_regs
bl do_irq


.align 5
fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq


#endif

uboot的层次关系