/*捕获模式,定时器A连续计数模式。有软件循环产生方波信号,信号同时接入
P1.1和P1.2 ,由CCR1由CCR1获取周期,CCR0确定信号占空比*/
#include "io430.h"
unsigned int jt,kt,lastCCR0,lastCCR1;
int main( void )
{
unsigned int i;
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
TACTL=TASSEL_2+ID_3+MC_2+TACLR;//SMCLK,8分频,连续模式
/*#define CM_0 (0*0x4000u) // Capture mode: 0 - disabled
#define CM_1 (1*0x4000u) //Capture mode: 1 - pos. edge
#define CM_2 (2*0x4000u) // Capture mode: 1 - neg. edge
#define CM_3 (3*0x4000u) //Capture mode: 1 - both edges */
CCTL0=CM_3+CCIS_0+SCS+CAP+CCIE;
CCTL1=CM_1+CCIS_1+SCS+CAP+CCIE;
jt=0;kt=0;
lastCCR0=0;
lastCCR1=0;
P1DIR=BIT2+BIT1;//设置P1.1,P1.2为输入
P1SEL=BIT2+BIT1;//设置P1.1,P1.2为第二功能
P3DIR=BIT0;//设置P3.0为输出
P3OUT=0X00;
__enable_interrupt();
while(1)
{
for(i=0;i<1000;i++)
__no_operation();
P3OUT^=BIT0;
}
return 0;
}
#pragma vector=TIMERA1_VECTOR
__interrupt void Timer_A1()
{
switch(TAIV)
{
case 2:
jt=CCR1-lastCCR1;//两次上升沿的时间间隔
lastCCR1=CCR1;
break;
case 4:break;
case 10:break;
}
}
#pragma vector=TIMERA0_VECTOR
__interrupt void Time_A0()
{//如果输入信号为低电平,则表明是下降沿捕获,前一次捕获的是
//上升沿,这一次捕获和上一次捕获之差即为高电平的时间
if(SCCI==0)
{
kt=CCR0-lastCCR0;
lastCCR0=CCR0;
}
}
P1.1和P1.2 ,由CCR1由CCR1获取周期,CCR0确定信号占空比*/
#include "io430.h"
unsigned int jt,kt,lastCCR0,lastCCR1;
int main( void )
{
unsigned int i;
// Stop watchdog timer to prevent time out reset
WDTCTL = WDTPW + WDTHOLD;
TACTL=TASSEL_2+ID_3+MC_2+TACLR;//SMCLK,8分频,连续模式
/*#define CM_0 (0*0x4000u) // Capture mode: 0 - disabled
#define CM_1 (1*0x4000u) //Capture mode: 1 - pos. edge
#define CM_2 (2*0x4000u) // Capture mode: 1 - neg. edge
#define CM_3 (3*0x4000u) //Capture mode: 1 - both edges */
CCTL0=CM_3+CCIS_0+SCS+CAP+CCIE;
CCTL1=CM_1+CCIS_1+SCS+CAP+CCIE;
jt=0;kt=0;
lastCCR0=0;
lastCCR1=0;
P1DIR=BIT2+BIT1;//设置P1.1,P1.2为输入
P1SEL=BIT2+BIT1;//设置P1.1,P1.2为第二功能
P3DIR=BIT0;//设置P3.0为输出
P3OUT=0X00;
__enable_interrupt();
while(1)
{
for(i=0;i<1000;i++)
__no_operation();
P3OUT^=BIT0;
}
return 0;
}
#pragma vector=TIMERA1_VECTOR
__interrupt void Timer_A1()
{
switch(TAIV)
{
case 2:
jt=CCR1-lastCCR1;//两次上升沿的时间间隔
lastCCR1=CCR1;
break;
case 4:break;
case 10:break;
}
}
#pragma vector=TIMERA0_VECTOR
__interrupt void Time_A0()
{//如果输入信号为低电平,则表明是下降沿捕获,前一次捕获的是
//上升沿,这一次捕获和上一次捕获之差即为高电平的时间
if(SCCI==0)
{
kt=CCR0-lastCCR0;
lastCCR0=CCR0;
}
}