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//
// File: main.c
//
// Microcontroller: dsPIC33FJ64GS610
// Compiler: MPLAB XC16 v1.11
// IDE: MPLAB X IDE v1.70
//
//
// NOTES:
// This code example shows the use of the Leading Edge Blanking (LEB) function
// to mask transients caused by High-Speed switching (MOSFETs/IGBTs)applications
// using remappable mapping. The LEB function enables the user-assigned application
// to ignore the expected transients caused by the High-Speed switching that occurs
// near the edges of the PWM output signals. This is done by using software to
// ignore current-limit and fault inputs for a period of 0 ns to 4251 ns in 8.32 ns
// increments following any specified rising or falling edge of the PWMxH and PWMxL
// signal. In this particular code example, pin 68 (RD8) will be used as the fault
// source signal to the PWM module. This fault signal will be ignored for a period
// of time as stated in the LEB (LEBDLY3<11:3>) bits. After this period has elapsed,
// PWM1H will be driven low. The fault signal will be triggered continuously every
// fourth PWM1H cycle.
//
// ADDITIONAL NOTES:
// Code Tested on:
// Explorer16 Development Board - Device: dsPIC33FJ64GS610 (100-pin TQFP)
//
//
// PWM1H: Pin 94
// PWM1L: Pin 93
// Fault1: Pin 68 (RD8)
//
//************************************************************************
#include "p33Fxxxx.h"
//Macros for Configuration of Fuse Registers:
//Invoke macros to set up device configuration fuse registers.
//The fuses will select the oscillator source, power-up timers, watch-dog
//timers etc. The macros are defined within the device header files.
//The configuration fuse registers reside in Flash memory.
// ISR declaration
void __attribute__((__interrupt__, no_auto_psv)) _PWM1Interrupt (void);
_FICD(JTAGEN_OFF & ICS_PGD1); // Disable JTAG and Communicate on PGC1/EMUC1 and PGD1/EMUD1
// Internal FRC Oscillator
_FOSCSEL(FNOSC_FRC & IESO_ON); // FRC Oscillator at start-up then switch to FRC with PLL
_FOSC(FCKSM_CSECMD & OSCIOFNC_OFF & POSCMD_NONE);
// Clock Switching is enabled and Fail Safe Clock Monitor is disabled
// OSC2 Pin Function: OSC2 is Clock Output
// Primary Oscillator Mode: Disabled
_FWDT(FWDTEN_OFF); // Watchdog Timer disabled
int main(void)
{
/// SET UP SYSTEM CLOCKS /
// Configure Oscillator to operate the device at 40Mhz (with FRC)
// Fosc = Fin*M/(N1*N2), Fcy = Fosc/2 = 80 MHz/2 = 40 MHz
// Fosc = 7.37M*43(2*2) = 80Mhz for 7.37 MHz input clock
PLLFBD = 41; // M = 43
CLKDIVbits.PLLPOST = 0; // N1 = 2
CLKDIVbits.PLLPRE = 0; // N2 = 2
CLKDIVbits.DOZE = 0; // Fcy = 40 MIPS
// Initiate Clock Switch to Internal FRC with PLL (NOSC = 0b001)
__builtin_write_OSCCONH(0x01);
__builtin_write_OSCCONL(0x01);
// Wait for Clock switch to occur
while (OSCCONbits.NOSC != 0b001);
/* --- Wait for PLL to lock --- */
while (OSCCONbits.LOCK != 1) {};
// Configure Auxillary Oscillator to setup the PWM clock for 120Mhz
// ACLK = (REFCLK * M) / N
// ACLK = ((FRC * 16) / APSTSCLR ) = (7.37 * 16) / 1 = ~ 120MHz
ACLKCONbits.FRCSEL = 1; // FRC provides input for Auxiliary PLL (x16)
ACLKCONbits.SELACLK = 1; // Auxiliary Oscillator provides clock source for PWM
ACLKCONbits.APSTSCLR = 7; // Divide Auxiliary clock by 1
ACLKCONbits.ENAPLL = 1; // Enable Auxiliary PLL
while(ACLKCONbits.APLLCK != 1); // Wait for Auxiliary PLL to Lock
// END OF SYSTEM CLOCK SET UP //
/ PWM1 MODULE SET UP /
// --- Period = 10 us (for frequency of 100 kHz) ---
// --- Complementary Mode ---
// --- Master Time Base Mode --- ---
PTCON = 0; // PWM Time Base Control Register (Module Disabled)
PTCON2bits.PCLKDIV = 0; // Prescalar option: 1:1 maximum PWM timing
PWMCON1bits.ITB = 0; // Master Time Base Mode
IOCON1bits.PMOD = 0; // Complementary output mode
PTPER = 9592; // Master Time Base
PDC1 = 4796; // Duty Cycle for PWM1 Module (50% - without dead time present)
PWMCON1bits.MDCS = 0; // PDC provides duty cycle information
PWMCON1bits.CAM = 0; // For edge-aligned mode of operation
IOCON1bits.PENH = 1; // PWM1H is controlled by PWM module
IOCON1bits.PENL = 1; // PWM1L is controlled by PWM module
IOCON1bits.POLL = 0; // PWM1L is active high
IOCON1bits.POLH = 0; // PWM1H is active high
PWMCON1bits.IUE = 0; // Update duty cycle at start of next PWM cycle
// --- Set up for Cycle-by-Cycle Mode --- //
FCLCON1bits.IFLTMOD = 0; // Normal Fault Mode
FCLCON1bits.FLTPOL = 0; // Fault input pin is set to active-high
IOCON1bits.FLTDAT = 0; // Shuts down PWM1L and PWM1H signals to inactive state
FCLCON1bits.CLSRC = 1; // Other than FLT1 source
FCLCON1bits.FLTSRC = 8; // Select fault source FLT1, Pin 68 on IC
FCLCON1bits.FLTMOD = 1; // PWM generator pins for FLTDAT values (cycle-by-cycle condition)
// --- Set up for LEADING EDGE BLANKING --- //
// PWM1 Leading Edge Blanking Control Version 1) Register
LEBCON1bits.PHR = 1; // Rising edge of PWM1H will trigger LEB counter
LEBCON1bits.PHF = 0; // LEB ignores falling edge of PWM1H
LEBCON1bits.PLR = 0; // Rising edge of PWM1L will trigger LEB counter
LEBCON1bits.PLF = 0; // LEB ignores falling edge of PWM1L
LEBCON1bits.CLLEBEN = 0; // Leading Edge Blanking is not applied to selected Current-Limit Input
LEBDLY1bits.LEB = 50; // Leading edge blanking delay
LEBCON1bits.FLTLEBEN = 1; // Leading Edge Blanking is applied to Fault 1 Input
// ---Added code for providing Trigger and PWM Interrupt --- //
TRIG1 = 0; // Trigger PWM ISR at beginning of cycle
TRGCON1bits.TRGDIV = 3; // Trigger output every 4th event\period
TRGCON1bits.TRGSTRT = 0; // First trigger event occurs after four trigger match events
PWMCON1bits.TRGIEN = 1; // Trigger event generates an interrupt request
/// END PWM1 MODULE SET UP //
// I/O Pin used for Fault Input
TRISDbits.TRISD8 = 0; // set RD8 as output digital I\O (pin 68)
// --- Enable PWM1 module and interrupt --- //
PTCONbits.PTEN = 1; // Set bit to enable PWM module
IEC5bits.PWM1IE = 1; // PWM1 interrupt request is enabled (for ISR)
while(1) // RUN PROGRAM CONTINUOUSLY
{
// just let code run
};
return 0;
} // end of main
/// INTERRUPT SERVICE ROUTINE (ISR) FOR PWM MODULE ///
void __attribute__((__interrupt__,no_auto_psv)) _PWM1Interrupt(void)
{
LATDbits.LATD8 = 1; // Toggle I\O RD8 HIGH
// Added Nop()s delay to modulate width of fault signal
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
Nop();
LATDbits.LATD8 = 0; // Toggle I\O RD8 LOW
IFS5bits.PWM1IF = 0; // Clear the interrupt flag status bit
}
dsPIC33F之PWM interrupt
最新推荐文章于 2023-06-14 21:57:48 发布