初识Layering Sequence

一、为什么需要Layering Sequence

随着集成电路技术的发展，芯片的复杂度日益提升。对验证而言，为了更好地应对这种复杂性，一方面是提高各个级别的可移植性和复用性，另一方面是提高抽象级别，减小复杂度。
Layering Sequence这正是从第二个方面出发衍生的，它能够将高抽象级的uvm_sequence_item和低抽象级的uvm_sequence_item相互转换。

二、Layering Sequence机制

下面以《芯片验证漫游指南》13.5.3节为例，简单分析Layering Sequence的工作机制

1、高抽象级的layer_trans和低抽象级的bus_trans

首先定义一个低抽象级的bus_trans，并且将其打包成为packet_seq

//低抽象级的bus_trans
class bus_trans extends uvm_sequence_item;
    rand phy_cmd_t cmd;
    rand int addr;
    rand int data;
    constraint cstr{
      soft addr == 'h0;
      soft data == 'h0;
    }
    ...
endclass

//打包后的packet_seq
class packet_seq extends uvm_sequence;
    rand int len;
    rand int addr;
    rand int data[];
    rand phy_cmd_t cmd;
    constraint cstr{
      soft len inside {[30:50]};
      soft addr[31:16] == 'hFF00;
      data.size() == len;
    }
    ...
    task body();
      bus_trans req;
      foreach(data[i])
        `uvm_do_with(req, {cmd == local::cmd; 
                           addr == local::addr;
                           data == local::data[i];})
    endtask
  endclass

其对应的sequencer是：

 class phy_master_sequencer extends uvm_sequencer;
    layering_sequencer up_sqr;
	...
endclass

接下来定义一个高抽象级layer_trans

class layer_trans extends uvm_sequence_item;
    rand layer_cmd_t layer_cmd;
    rand int pkt_len;
    rand int pkt_idle;
    constraint cstr {
      soft pkt_len inside {[10: 20]};
      layer_cmd == FREQ_LOW_TRANS -> pkt_idle inside {[300:400]};
      layer_cmd == FREQ_MED_TRANS -> pkt_idle inside {[100:200]};
      layer_cmd == FREQ_HIGH_TRANS -> pkt_idle inside {[20:40]};
    }
    ...
  endclass

其对应的sequencer是：

 class layering_sequencer extends uvm_sequencer;
    ...
  endclass

可以看到高抽象级的layer_trans和低抽象级的bus