AG6K(MCU) SoC FPGA

AGM AG6K(MCU) SoC is targeted to high-volume applications, enabling system designers to meet increasing performance requirements while lowering costs. It is based on AGM SoC architecture. This device integrate one MCU core, AGM programmable logic, 12-bit ADC, 64Mbits SDRAM and 12Mbits SPI NOR FLASH in single device.

Features

MCU Architecture:
• One-core MCU: Working frequency up to 250 MHz
• On-Chip Memory: 128Kbytes SRAM
• I/O Interfaces:
• External AHB Slave Interface
• On-Chip Memory Access Ports
• UART Interface
• GPIOs
• JTAG Debug Ports
• SPI Flash Interface
• Interconnect: AMBA® AHB compatible based

SDRAM:
• 16bits datawidth
• 64Mbits capability
• up to 166MHz working frequency

SPI Flash:
• 12Mbits capability

Analog-to-Digital Converters（ADC）:
• 12bits accuracy
• 1MHz sampling frequency
• On-chip temperature sensing
• Up to 10 channels (include internal temperature sensor channel)

FPGA Architecture:
• High-density architecture with 6K LEs
• M9K embedded memory blocks, up to 504 Kbits of RAM space
• Up to 56 18 x 18-bit embedded multipliers are each configurable as two independent 9 x 9-bit multipliers
• Provides 4 PLLs per device provide clock multiplication and phase shifting
• High-speed differential I/O standard support, including LVDS, RSDS, mini-LVDS, LVPECL
• Support DDR, DDR2
• Single-ended I/O standard support, including 3.3V, 2.5V, 1.8V, and 1.5V LVCMOS and LVTTL
• Flexible device configuration mode: JTAG and AS, PS
• Support remote update, by “dual-boot” like implementation

AGM AG6K（MCU）SoC面向大批量，成本敏感型应用，使系统设计人员能够在降低成本的同时满足不断增长的性能要求。它基于AGM SoC架构。该器件在单个器件中集成了一个MCU内核，AGM可编程逻辑，12位ADC，64Mbit SDRAM和12Mbit SPI NOR FLASH。

硬件配置

MCU体系结构的功能：
•单核MCU：工作频率高达250 MHz
•片上存储器：128 KB SRAM
•I / O接口：
•外部AHB从接口
•片上存储器访问端口
•UART接口
•GPIO
•JTAG调试端口
•SPI闪存接口
•互连：基于AMBA®AHB的可兼容

SDRAM：
•16位数据宽度
• 64Mbits 能力
•高达166MHz的工作频率

SPI Flash：
•12Mbits能力

模数转换器（ADC）：
•12位精度
•1MHz采样频率
•片内温度检测
•多达10个通道（包括内部温度传感器通道）

FPGA架构：
•具有6K LE的高密度架构
•M9K嵌入式存储器块，最大504 Kbit RAM空间
•最多可将56个18 x 18位嵌入式乘法器配置为两个独立的9 x 9位乘法器
•每个设备提供4个PLL，提供时钟乘法和相移
•高速差分I / O标准支持，包括LVDS，RSDS，mini-LVDS，LVPECL
•支持DDR，DDR2
•单端I / O标准支持，包括3.3V，2.5V，1.8V和1.5V LVCMOS和LVTTL
•灵活的设备配置模式：JTAG和AS，PS
•通过“双启动”等方式支持远程更新

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