Xilinx ISE 出现 Bitgen:342 - This design contains pins which have locations (LOC)...解决办法

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当Xilinx ISE出现以下情况时

ERROR:Bitgen:342 - This design contains pins which have locations (LOC) that are
   not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. 
   This may cause I/O contention or incompatibility with the board power or
   connectivity affecting performance, signal integrity or in extreme cases
   cause damage to the device or the components to which it is connected.  To
   prevent this error, it is highly suggested to specify all pin locations and
   I/O standards to avoid potential contention or conflicts and allow proper
   bitstream creation.  To demote this error to a warning and allow bitstream
   creation with unspecified I/O location or standards, you may apply the
   following bitgen switch: -g UnconstrainedPins:Allow

最简单的方法是 右键Generate Programming File 点击Process Properties

右下角选择Advanced

在Other Bitgen Command Line Options中 填入

-g UnconstrainedPins:Allow

可以发现error变成了warning

另一种错误是因为选择器件信息设置错误，重新设置