Xilinx hdenH焊板子过程错误分析

首先在测试连接的时候，只是显示identity success，但是却找不到芯片，后来才发现，原来JTAG的接口反了。

把接口调过来之后就好了，然后在进行分频测试的时候，ISE生成BIT文件老是失败，提示

This design contains pins which have locations (LOC) that are not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To prevent this error, it is highly suggested to specify all pin locations and I/O standards to avoid potential contention or conflicts and allow proper bitstream creation. To demote this error to a warning and allow bitstream creation with unspecified I/O location or standards, you may apply the following bitgen switch: -g UnconstrainedPins:Allow

百度之后，应该是UCF的问题，上面提示的意思是有些管脚没有分配，可是我只是做分频测试，所以根本不需要分配，所以按照网上的方法，令bitgen switch: -g UnconstrainedPins:Allow，具体操作为：

这样就可以了。