使用PlanAhead工具生成zedboard的bit文件时遇到错误提示，涉及未指定的引脚位置和I/O标准可能导致问题。解决方法包括检查UCF文件是否存在非法字符，确保所有顶层端口的LOC和IO标准约束已指定，或者在Bitgen设置中添加特定开关以允许未约束的引脚。在编写zedboard的裸机应用程序时，可能会遇到类似错误，但通过重新尝试可以成功验证IP核功能。
用PlanAhead来生成bit文件，几天一直在出现这个错误，却找不出来：
[Bitgen 342] This design contains pins which have locations (LOC) that are not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To prevent this error, it is highly suggested to specify all pin locations and I/O standards to avoid potential contention or conflicts and allow proper bitstream creation. To demote this error to a warning and allow bitstream creation with unspecified I/O location or standards, you may apply the following bitgen switch: -g UnconstrainedPins:Allow
[Bitgen 157] Bitgen will terminate because of the above errors.
解决办法：
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