FPGA SATA+RAID0 xilinx vivado z7 k7存储
SATA Features
- Detect OOB and COMWAKE
- Detect the K28.5 comma character and provide a 16 bit parallel output
- Power management mode handled by state machine (shared between Phy and Link layer)
- Provides error indication to upper layers
- 8b 10b encoding and decoding in Xilinx SERDES
- Auto Speed negotiation (Gen 2 or Gen 3)
- Scrambling of tx data and descrambling of rx data
- CRC 32 calculation and check
- Report transmission status and error to Transport Layer
- Auto inserted hold primitive to avoid FIFO overflow and underflow
- Partial and slumber power management modes
- The interface between the link layer and the transport layer is 32-bit wide
- 48-bits sector address
- Programmed IO (PIO) and DMA modes
- Automatic error FIS retry capability
- Implement Shadow Registers and SATA SuperSet registers
- NCQ supported (not used in
FPGA SATA+RAID0 xilinx vivado z7 k7存储
最新推荐文章于 2024-04-28 14:11:28 发布