SPI 1 - What is SPI?

最新推荐文章于 2024-07-27 18:35:45 发布

李锐博恩

最新推荐文章于 2024-07-27 18:35:45 发布

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分类专栏： Verilog/FPGA 实用总结区

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SPI is a simple interface that allows one chip to communicate with one or more other chips.

How does it look?

Let's start with a simple example where only two chips have to communicate together.

SPI requires 4 wires to be used in between the two chips.

As you can see, the wires are called SCK, MOSI, MISO and SSEL, and one of the chip is called the SPI master, while the other the SPI slave.

SPI fundamentals

Basically:

It is synchronous.
It is full-duplex serial.
It is not plug-and-play.
There is one (and only one) master, and one (or more) slaves.

In more details:

Synchronous: a clock is generated by the master.
Full-duplex serial: data is serialized, one bit of data is transferred in each direction during each clock period, so two data wires are used (MOSI and MISO).
Not plug-and-play: The master and slave know beforehand the details of the communication (bit order, length of data words exchanged, etc...).
One master: slave(s) cannot initiates communication, only the master can. The slave(s) listen and respond.

Simple transfer

Let's assume that the master and slave expect 8-bits data transfers, with MSB transmitted first.
Here's how would look a single 8-bits data transfer.

The line MOSI is the "master output" while MISO is the "slave output". Since SPI is full-duplex, both lines toggles simultaneously, with different data going from master-to-slave, and slave-to-master.

In more details:

The master pulls SSEL down to indicate to the slave that communication is starting (SSEL is active low).
The master toggles the clock eight times and sends eight data bits on its MOSI line. At the same time it receives eight data bits from the slave on the MISO line.
The master pulls SSEL up to indicate that the transfer is over.

If the master had more than one 8-bits data to send/receive, it could keep sending/receiving and de-assert SSEL only when it is done.

Multiple slaves

An SPI master can communicate with multiples slaves in two ways: by connecting most signals in parallel and adding SSEL lines, or by chaining the slaves.