1、使用always过程块实现一个可加减与或非运算的运算器
(1)、代码部分:
`define plus 3'd0
`define minus 3'd1
`define band 3'd2
`define bor 3'd3
`define unegate 3'd4
module alu(out,opcode,a,b);
input [7:0]a,b;
input [2:0]opcode;
output [7:0]out;
reg [7:0]out;
always @(opcode,a,b)
begin
case(opcode)
`plus : out=a+b;
`minus : out=a-b;
`band : out=a&b;
`bor : out=a|b;
`unegate : out=~a;
default : out=8'hx;
endcase
end
endmodule
(2)testbench模块:
`include "alu.v"
module alu_stimulus;
reg [2:0]opcode;
reg [7:0]a,b;