一、实验电路图、状态图、程序代码、仿真代码、仿真波形图(可以只写出核心功能代码,代码要有注释)
![](https://img-blog.csdnimg.cn/direct/5108c63b2e6f4bf6ac4041dfe382c7bd.png)
代码文件
![](https://img-blog.csdnimg.cn/direct/82bb3161cc0e4601865d1e738938ddeb.png)
![](https://img-blog.csdnimg.cn/direct/715f41519478412394728681988be19b.png)
![](https://img-blog.csdnimg.cn/direct/78502521c9244483bfe4b7d9c91d9ed4.png)
![](https://img-blog.csdnimg.cn/direct/ffd7906cd28840cc963e4fdf62f81ee2.png)
激励文件
![](https://img-blog.csdnimg.cn/direct/43a31e42c5d94c84b4485264828099f3.png)
![](https://img-blog.csdnimg.cn/direct/c7e2bee5e60840afb04a6f6aed7fc0ef.png)
Modelsim仿真
![](https://img-blog.csdnimg.cn/direct/855aa3b5150147f3b9da6239f4af77e8.png)
![](https://img-blog.csdnimg.cn/direct/7463eeaca6e24fe3a175bc097b2b7340.png)
二、引脚分配表(电路中的信号名称->主板器件名称->引脚号PIN)
信号名 | 主板器件 | PIN | 信号名 | 主板器件 | PIN | |
clk | CLK0/IO0 | PIN_90 | ||||
f0 | ECLK | PIN_23 | ||||
f1 | LED0 | PIN_46 | ||||
f2 | LED1 | PIN_50 | ||||
p | Key0/SW0/LED8 | PIN_24 | ||||
sta | Key1/SW1/LED9 | PIN_31 | ||||
三、编译报告
Top-level Entity name | Family | Device |
zsy_2327_8 | Cyclone IV E | EP4CE6E22C8 |
Total logic elements | Total registers | Total pins |
59/6,272( <1% ) | 19 | 6/92( 7% ) |
Total memory bits | Embedded Multiplier 9-bit elements | Total PLLs |
0/276,480( 0% ) | 0/30( 0% ) | 0/2( 0% ) |