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HDLBits Subject
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[HDLBits] Vectors practise
Vectors题目Vectors are used to group related signals using one name to make it more convenient to manipulate. For example, wire [7:0] w; declares an 8-bit vector named w that is functionally equivalen...原创 2020-03-12 18:19:51 · 359 阅读 · 0 评论 -
[HDLBits] Basics practise
Practise 1: Simple Wire题目:Create a module with one input and one output that behaves like a wire.Unlike physical wires, wires (and other signals) in Verilog are directional. This means information ...原创 2020-03-11 17:31:36 · 541 阅读 · 0 评论