MT7688 dts 和pinmux 关系

文件路径
1./build_dir/target-mipsel_24kec+dsp_uClibc-0.9.33.2/linux-ramips_mt7688/linux-3.18.29/arch/mips/include/asm/mach-ralink

pinmux.h

#ifndef _RT288X_PINMUX_H__
#define _RT288X_PINMUX_H__

//name=节点名字，value=节点值 pin_first=开始pin，pin_count=有几个pin
#define FUNC(name, value, pin_first, pin_count) { name, value, pin_first, pin_count }

#define GRP(_name, _func, _mask, _shift) \
	{ .name = _name, .mask = _mask, .shift = _shift, \
	  .func = _func, .gpio = _mask, \
	  .func_count = ARRAY_SIZE(_func) }

#define GRP_G(_name, _func, _mask, _gpio, _shift) \
	{ .name = _name, .mask = _mask, .shift = _shift, \
	  .func = _func, .gpio = _gpio, \
	  .func_count = ARRAY_SIZE(_func) }

struct rt2880_pmx_group;

struct rt2880_pmx_func {
	const char *name;
	const char value;

	int pin_first;
	int pin_count;
	int *pins;

	int *groups;
	int group_count;

	int enabled;
};

struct rt2880_pmx_group {
	const char *name;
	int enabled;

	const u32 shift;
	const char mask;
	const char gpio;

	struct rt2880_pmx_func *func;
	int func_count;
};

2.build_dir/target-mipsel_24kec+dsp_uClibc-0.9.33.2/linux-ramips_mt7688/linux-3.18.29/arch/mips/ralink
mt7620.c

static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
	FUNC("sdxc d6", 3, 19, 1),
	FUNC("utif", 2, 19, 1),
	FUNC("gpio", 1, 19, 1),
	FUNC("pwm1", 0, 19, 1),
};

static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
	FUNC("sdxc d7", 3, 18, 1),
	FUNC("utif", 2, 18, 1),
	FUNC("gpio", 1, 18, 1),
	FUNC("pwm0", 0, 18, 1),
};

static struct rt2880_pmx_func uart2_grp_mt7628[] = {
	FUNC("sdxc d5 d4", 3, 20, 2),
	FUNC("pwm", 2, 20, 2),
	FUNC("gpio", 1, 20, 2),
	FUNC("uart2", 0, 20, 2),
};

static struct rt2880_pmx_func uart1_grp_mt7628[] = {
	FUNC("sw_r", 3, 45, 2),
	FUNC("pwm", 2, 45, 2),
	FUNC("gpio", 1, 45, 2),
	FUNC("uart1", 0, 45, 2),
};

static struct rt2880_pmx_func i2c_grp_mt7628[] = {
	FUNC("-", 3, 4, 2),
	FUNC("debug", 2, 4, 2),
	FUNC("gpio", 1, 4, 2),
	FUNC("i2c", 0, 4, 2),
};

static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 37, 1) };
static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 36, 1) };
static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };

static struct rt2880_pmx_func sd_mode_grp_mt7628[] = {
	FUNC("jtag", 3, 22, 8),
	FUNC("utif", 2, 22, 8),
	FUNC("gpio", 1, 22, 8),
	FUNC("sdxc", 0, 22, 8),
};

static struct rt2880_pmx_func uart0_grp_mt7628[] = {
	FUNC("-", 3, 12, 2),
	FUNC("-", 2, 12, 2),
	FUNC("gpio", 1, 12, 2),
	FUNC("uart0", 0, 12, 2),
};

static struct rt2880_pmx_func i2s_grp_mt7628[] = {
	FUNC("antenna", 3, 0, 4),
	FUNC("pcm", 2, 0, 4),
	FUNC("gpio", 1, 0, 4),
	FUNC("i2s", 0, 0, 4),
};

static struct rt2880_pmx_func spi_cs1_grp_mt7628[] = {
	FUNC("-", 3, 6, 1),
	FUNC("refclk", 2, 6, 1),
	FUNC("gpio", 1, 6, 1),
	FUNC("spi cs1", 0, 6, 1),
};

static struct rt2880_pmx_func spis_grp_mt7628[] = {
	FUNC("pwm", 3, 14, 4),
	FUNC("util", 2, 14, 4),
	FUNC("gpio", 1, 14, 4),
	FUNC("spis", 0, 14, 4),
};

static struct rt2880_pmx_func gpio_grp_mt7628[] = {
	FUNC("pcie", 3, 11, 1),
	FUNC("refclk", 2, 11, 1),
	FUNC("gpio", 1, 11, 1),
	FUNC("gpio", 0, 11, 1),
};

struct rt2880_pmx_func wled_an_grp_mt7628[] = {
        FUNC("rsvd", 3, 44, 1),
        FUNC("rsvd", 2, 44, 1),
        FUNC("gpio", 1, 44, 1),
        FUNC("wled_an", 0,44, 1),
};


static struct rt2880_pmx_func ephy_p1_grp_mt7628[] = {
        FUNC("rsvd", 3, 42, 1),
        FUNC("rsvd", 2, 42, 1),
        FUNC("gpio", 1, 42, 1),
        FUNC("ephy", 0, 42, 1),
};
static struct rt2880_pmx_func ephy_p2_grp_mt7628[] = {
        FUNC("rsvd", 3, 41, 1),
        FUNC("rsvd", 2, 41, 1),
        FUNC("gpio", 1, 41, 1),
        FUNC("ephy", 0, 41, 1),
};
static struct rt2880_pmx_func ephy_p3_grp_mt7628[] = {
        FUNC("rsvd", 3, 40, 1),
        FUNC("rsvd", 2, 40, 1),
        FUNC("gpio", 1, 40, 1),
        FUNC("ephy", 0, 40, 1),
};
static struct rt2880_pmx_func ephy_p4_grp_mt7628[] = {
        FUNC("rsvd", 3, 39, 1),
        FUNC("rsvd", 2, 39, 1),
        FUNC("gpio", 1, 39, 1),
        FUNC("ephy", 0, 39, 1),
};

#define MT7628_GPIO_MODE_MASK		0x3
#define MT7628_GPIO_MODE_EPHY_P4        42
#define MT7628_GPIO_MODE_EPHY_P3        40
#define MT7628_GPIO_MODE_EPHY_P2        38
#define MT7628_GPIO_MODE_EPHY_P1        36
#define MT7628_GPIO_MODE_WLED_AN	32
#define MT7628_GPIO_MODE_PWM1		30
#define MT7628_GPIO_MODE_PWM0		28
#define MT7628_GPIO_MODE_UART2		26
#define MT7628_GPIO_MODE_UART1		24
#define MT7628_GPIO_MODE_I2C		20
#define MT7628_GPIO_MODE_REFCLK		18
#define MT7628_GPIO_MODE_PERST		16
#define MT7628_GPIO_MODE_WDT		14
#define MT7628_GPIO_MODE_SPI		12
#define MT7628_GPIO_MODE_SDMODE		10
#define MT7628_GPIO_MODE_UART0		8
#define MT7628_GPIO_MODE_I2S		6
#define MT7628_GPIO_MODE_CS1		4
#define MT7628_GPIO_MODE_SPIS		2
#define MT7628_GPIO_MODE_GPIO		0

static struct rt2880_pmx_group mt7628an_pinmux_data[] = {
	GRP_G("pwm1", pwm1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM1),
	GRP_G("pwm0", pwm0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_PWM0),
	GRP_G("uart2", uart2_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART2),
	GRP_G("uart1", uart1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART1),
	GRP_G("i2c", i2c_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_I2C),
	GRP("refclk", refclk_grp_mt7628, 1, MT7628_GPIO_MODE_REFCLK),
	GRP("perst", perst_grp_mt7628, 1, MT7628_GPIO_MODE_PERST),
	GRP("wdt", wdt_grp_mt7628, 1, MT7628_GPIO_MODE_WDT),
	GRP("spi", spi_grp_mt7628, 1, MT7628_GPIO_MODE_SPI),
	GRP_G("sdmode", sd_mode_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_SDMODE),
	GRP_G("uart0", uart0_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_UART0),
	GRP_G("i2s", i2s_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_I2S),
	GRP_G("spi cs1", spi_cs1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_CS1),
	GRP_G("spis", spis_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_SPIS),
	GRP_G("gpio", gpio_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_GPIO),
	GRP_G("wled_an", wled_an_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_WLED_AN),
        GRP_G("ephy_p1", ephy_p1_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_EPHY_P1),
        GRP_G("ephy_p2", ephy_p2_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_EPHY_P2),
        GRP_G("ephy_p3", ephy_p3_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_EPHY_P3),
        GRP_G("ephy_p4", ephy_p4_grp_mt7628, MT7628_GPIO_MODE_MASK, 1, MT7628_GPIO_MODE_EPHY_P4),

	{ 0 }
};