8*8SRAM编写

8*8SRAM:

module sram_8_8(cs,rd,wr,address,din,dout);
    input cs,rd,wr;
    input [2:0] address;
    input [7:0] din;
    output [7:0] dout;
   
    reg [7:0] dout;
    reg [7:0] sram [0:7]; //??????
   
    always @ (cs or rd or wr or address or din)
    begin
        if (wr == 1'b1)  //???
        begin
            if ((cs == 1'b1) && (rd == 1'b0))
            sram[address] <= din;
        end
        else if (rd == 1'b1) //???
        begin
            if((cs == 1'b1) && (wr == 1'b0))
            dout <= sram[address];
        end
    end
endmodule

测试程序：

module test_sram_8_8();
    reg cs,rd,wr;
    reg [2:0]address;
    reg [7:0] din;
    wire dout;
    initial
    begin
        cs <= 1;
        rd <= 0;
        wr <= 1;
        address <= 3'b010;
        din <= 8'b00011011;
        # 50
        rd <= 1;
        wr <= 0;
        # 50
        rd <= 0;
        wr <= 1;
        address <= 3'b011;
        din <= 8'b00011010;
        # 50
        rd <= 1;
        wr <= 0;
  
  
  
  
  
  
    end

 

 

sram_8_8 M(cs,rd,wr,address,din,dout);

endmodule

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