#ifndef APP_INCLUDE_UART0_H_
#define APP_INCLUDE_UART0_H_
#include "ets_sys.h"
#include "osapi.h"
#include "uart0.h"
#include "uart_register.h"
#define UART0 0
typedef enum
{
FIVE_BITS = 0x0,
SIX_BITS = 0x1,
SEVEN_BITS = 0x2,
EIGHT_BITS = 0x3
} UartBitsNum;
typedef enum
{
ONE_STOP_BIT = 0x1,
ONE_HALF_STOP_BIT = 0x2,
TWO_STOP_BIT = 0x3
} UartStopBitsNum;
typedef enum
{
NONE_BITS = 0x2,
ODD_BITS = 1,
EVEN_BITS = 0
} UartParityMode;
typedef enum
{
STICK_PARITY_DIS = 0,
STICK_PARITY_EN = 1
} UartParityEN;
typedef enum
{
BIT_RATE_300 = 300,
BIT_RATE_600 = 600,
BIT_RATE_1200 = 1200,
BIT_RATE_2400 = 2400,
BIT_RATE_4800 = 4800,
BIT_RATE_9600 = 9600,
BIT_RATE_19200 = 19200,
BIT_RATE_38400 = 38400,
BIT_RATE_57600 = 57600,
BIT_RATE_74880 = 74880,
BIT_RATE_115200 = 115200,
BIT_RATE_230400 = 230400,
BIT_RATE_460800 = 460800,
BIT_RATE_921600 = 921600,
BIT_RATE_1843200 = 1843200,
BIT_RATE_3686400 = 3686400,
} UartBautRate;
typedef struct
{
UartBautRate baut_rate;
UartBitsNum data_bits;
UartParityEN en_parity;
UartParityMode parity;
UartStopBitsNum stop_bits;
} UartControlblock;
void ICACHE_FLASH_ATTR uart0_init(UartControlblock *Ucb);
LOCAL void uart0_rx_intr_handler(void *para);
voiduart_tx_one_char(u8 data);
#endif
#include "uart0.h"
u8 UART0_RX_BUFF[256];
LOCAL void uart0_rx_intr_handler(void *para)
{
u32 uart0_intr_sta;
u8 data_len;
u8 i;
uart0_intr_sta=READ_PERI_REG(UART_INT_ST(UART0));
if(UART_RXFIFO_TOUT_INT_ST==(uart0_intr_sta&UART_RXFIFO_TOUT_INT_ST))
{
data_len=(READ_PERI_REG(UART_STATUS(UART0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT;
for(i=0;i<data_len;i++)
UART0_RX_BUFF[i]=READ_PERI_REG(UART_FIFO(UART0))&0xFF;
os_printf("%s\r\n",UART0_RX_BUFF);
os_memset(UART0_RX_BUFF,0,256);
}
WRITE_PERI_REG(UART_INT_CLR(UART0), 0xffff);
}
void ICACHE_FLASH_ATTR uart0_init(UartControlblock *Ucb)
{
ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD);
uart_div_modify(UART0, UART_CLK_FREQ / (Ucb->baut_rate));
SET_PERI_REG_MASK(UART_CONF0(UART0), ((Ucb->en_parity & UART_PARITY_EN_M) << UART_PARITY_EN_S));
SET_PERI_REG_MASK(UART_CONF0(UART0), ((Ucb->parity & UART_PARITY_M) << UART_PARITY_S));
SET_PERI_REG_MASK(UART_CONF0(UART0), ((Ucb->stop_bits & UART_STOP_BIT_NUM) << UART_STOP_BIT_NUM_S));
SET_PERI_REG_MASK(UART_CONF0(UART0), ((Ucb->data_bits & UART_BIT_NUM) << UART_BIT_NUM_S));
SET_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
CLEAR_PERI_REG_MASK(UART_CONF0(UART0), UART_RXFIFO_RST | UART_TXFIFO_RST);
SET_PERI_REG_MASK(UART_CONF1(UART0),((0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S));
SET_PERI_REG_MASK(UART_CONF1(UART0),UART_RX_TOUT_EN);
SET_PERI_REG_MASK(UART_INT_ENA(UART0), UART_RXFIFO_TOUT_INT_ENA);
WRITE_PERI_REG(UART_INT_CLR(UART0), 0xffff);
ETS_UART_INTR_ENABLE();
}
UartControlblock Uart0CB=
{
BIT_RATE_115200,
EIGHT_BITS,
STICK_PARITY_DIS,
NONE_BITS,
ONE_STOP_BIT,
};
void ICACHE_FLASH_ATTR
user_init(void)
{
uart0_init(&Uart0CB);
}