DeviceTree - Freescale的i.MX芯片的pinctrl设置

1,文档位置：

Documentation\devicetree\bindings\pinctrl\fsl,imx-pinctrl.txt

Freescale IOMUX Controller (IOMUXC) for i.MX

IOMUX 控制器（IOMUXC）与 IOMUX 配合使用，可使集成电路与多个功能块共享一个 PAD。共享是通过多路复用 PAD 输入/输出信号来实现的。每个 PAD 最多有 8 种复用选项（称为 ALT 模式）。由于不同的模块需要不同的 PAD 设置（如上拉、保持等），因此 IOMUXC 还可以控制 PAD 设置参数。

The IOMUX Controller (IOMUXC), together with the IOMUX, enables the IC to share one PAD to several functional blocks. The sharing is done by multiplexing the PAD input/output signals. For each PAD there are up to 8 muxing options (called ALT modes). Since different modules require different PAD settings (like pull up, keeper, etc) the IOMUXC controls also the PAD settings parameters.

有关客户端设备常用 pinctrl 绑定的详细信息，包括 "引脚配置节点 "的含义，请参阅本目录中的 pinctrl-bindings.txt。

Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the phrase "pin configuration node".

飞思卡尔 IMX 引脚配置节点是一组引脚的节点，可用于特定设备或功能。该节点代表该组引脚的复用和配置。”mux " 选择该引脚可工作的功能模式（也称为 muxmode），"config "配置各种焊盘设置，如上拉、漏极开路、驱动强度等。

Freescale IMX pin configuration node is a node of a group of pins which can beused for a specific device or function. This node represents both mux and config of the pins in that group. The 'mux' selects the function mode(also named muxmode) this pin can work on and the 'config' configures various pad settingssuch as pull-up, open drain, drive strength, etc.

iomux 控制器所需的属性：

- compatible：“fsl，<soc>-iomuxc”

  请参阅每个 fsl,<soc>-pinctrl.txt 绑定文档以了解支持的 SoC。

Required properties for iomux controller: - compatible: "fsl,<soc>-iomuxc"   Please refer to each fsl,<soc>-pinctrl.txt binding doc for supported SoCs.

引脚配置节点所需的属性：

- fsl,pins：每个条目由 6 个整数组成，代表一个引脚的复用器和配置设置。前 5 个整数 <mux_reg conf_reg input_reg mux_val input_val> 使用 PIN_FUNC_ID 宏指定，该宏可以在设备树源文件夹下的 imx*-pinfunc.h 中找到。最后一个整数 CONFIG 是焊盘设置值，例如该引脚上的上拉电阻。这就是为什么 fsl,pins 条目在下面的示例中看起来像 <PIN_FUNC_ID CONFIG> 。

Required properties for pin configuration node: - fsl,pins: each entry consists of 6 integers and represents the mux and config setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val  input_val> are specified using a PIN_FUNC_ID macro, which can be found in  imx*-pinfunc.h under device tree source folder. The last integer CONFIG is  the pad setting value like pull-up on this pin. And that's why fsl,pins entry  looks like <PIN_FUNC_ID CONFIG> in the example below.

用于配置的位：

NO_PAD_CTL(1 << 31)：表示该引脚不需要配置。

Bits used for CONFIG: NO_PAD_CTL(1 << 31): indicate this pin does not need config.

当使用 0x80000000（又名 NO_PAD_CTL）作为焊盘配置值时，SW_PAD_CTL 寄存器不会被修改。因此，在此应更明确地指定重置默认值。

When 0x80000000 (aka NO_PAD_CTL) is used as pad config value, the SW_PAD_CTL register isn't modified. Instead be more explicit here and specify the reset default value. https://patchwork.kernel.org/project/linux-arm-kernel/patch/1468145266-7567-7-git-send-email-uwe@kleine-koenig.org/

SION(1 << 30)：现场软件输入。

无论 MUX_MODE 功能如何，都强制选中多路复用模式中的输入路径，即能够读取IO状态。

默认情况下，输入路径是由所选多路复用器模式（常规）的功能确定。

软件输入开启 (SION) 意味着可以读回输出的逻辑值。

SION(1 << 30): Software Input On Field. Force the selected mux mode input path no matter of MUX_MODE functionality. By default the input path is determined by functionality of the selected mux mode (regular). Software input on (SION) whcih means that the logical value of an output can be read back.

其他位用于 PAD 设置。

请参阅每个 fsl,<soc>-pinctrl,txt 绑定文档，了解 SoC 特定部分的位定义。

Other bits are used for PAD setting. Please refer to each fsl,<soc>-pinctrl,txt binding doc for SoC specific part of bits definitions.

注意：

使用 fsl,imx-pinctrl 绑定的一些要求：

1. 我们在iomux控制器节点下定义了pin功能节点来表示该SoC支持哪些pinmux功能。

2. 用于特定功能的引脚配置节点应在该特定功能节点下定义。

   功能节点的名称应该很好地表示该引脚配置节点中的这组引脚正在执行什么功能。

3. 驱动程序可以使用功能节点的名称和引脚配置节点的名称来描述引脚功能和组层次结构。

   例如，Linux IMX pinctrl 驱动程序以功能节点的名称作为函数名称，以引脚配置节点的名称作为组名称来创建映射表。

4. 每个管脚配置节点应该有一个phandle，设备可以通过参考该管脚配置节点的phandle 来设置管脚配置。

NOTE: Some requirements for using fsl,imx-pinctrl binding: 1. We have pin function node defined under iomux controller node to represent what pinmux functions this SoC supports. 2. The pin configuration node intends to work on a specific function should to be defined under that specific function node.    The function node's name should represent well about what function this group of pins in this pin configuration node are working on. 3. The driver can use the function node's name and pin configuration node's name describe the pin function and group hierarchy.     For example, Linux IMX pinctrl driver takes the function node's name as the function name and pin configuration node's name as group name to create the map table. 4. Each pin configuration node should have a phandle, devices can set pins configurations by referring to the phandle of that pin configuration node.

Examples:

usdhc@219c000 { /* uSDHC4 */

    non-removable;

    vmmc-supply = <&reg_3p3v>;

    pinctrl-names = "default";

    pinctrl-0 = <&pinctrl_usdhc4_1>;

};



iomuxc@20e0000 {

    compatible = "fsl,imx6q-iomuxc";

    reg = <0x020e0000 0x4000>;



    /* shared pinctrl settings */

    usdhc4 {

        pinctrl_usdhc4_1: usdhc4grp-1 {

            fsl,pins = <

                MX6QDL_PAD_SD4_CMD__SD4_CMD    0x17059

                MX6QDL_PAD_SD4_CLK__SD4_CLK    0x10059

                MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059

                MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059

                MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059

                MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059

                MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059

                MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059

                MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059

                MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059

            >;

    };

    ....

};

请参阅imx6q数据表中的IOMUXC控制器章节，0x17059表示启用迟滞、47KOhm上拉、50Mhz速度、80Ohm驱动强度和快速转换速率。

用户应参考每个 SoC 规范来设置正确的值。

Refer to the IOMUXC controller chapter in imx6q datasheet, 0x17059 means enable hysteresis, 47KOhm Pull Up, 50Mhz speed,80Ohm driver strength and Fast Slew Rate. User should refer to each SoC spec to set the correct value.

2, 文档位置：

Documentation\devicetree\bindings\pinctrl\fsl,imx6ul-pinctrl.txt

上面内容是freescale的i.MX系列芯片binding部分的通用说明，具体的某个芯片，还可以有更详细的说明，以imx6ul为例。

所需属性：

- 兼容： "fsl,imx6ul-iomuxc "用于主 IOMUX 控制器，"fsl,imx6ull-iomuxc-snvs "用于 i.MX 6ULL 的 SNVS IOMUX 控制器。

- fsl,pins：每个条目由 6 个整数组成，代表一个引脚的多路复用器和配置设置。 前 5 个整数 <mux_reg conf_reg input_reg mux_val input_val> 是使用 PIN_FUNC_ID 宏指定的，可在设备树源代码文件夹下的 imx6ul-pinfunc.h 中找到。 最后一个整数 CONFIG 是焊盘设置值，比如上拉该引脚。 有关 CONFIG 设置的详细信息，请参阅《i.MX6 UltraLite 参考手册》。

Required properties: - compatible: "fsl,imx6ul-iomuxc" for main IOMUX controller or   "fsl,imx6ull-iomuxc-snvs" for i.MX 6ULL's SNVS IOMUX controller. - fsl,pins: each entry consists of 6 integers and represents the mux and config setting for one pin.  The first 5 integers <mux_reg conf_reg input_reg mux_val input_val> are specified using a PIN_FUNC_ID macro, which can be found in imx6ul-pinfunc.h under device tree source folder.  The last integer CONFIG is the pad setting value like pull-up on this pin.  Please refer to i.MX6 UltraLite Reference Manual for detailed CONFIG settings.

下面是i.MX6UL芯片的每个引脚的PAD设置值的详细说明：

CONFIG bits definition:

PAD_CTL_HYS                     (1 << 16)

PAD_CTL_PUS_100K_DOWN           (0 << 14)

PAD_CTL_PUS_47K_UP              (1 << 14)

PAD_CTL_PUS_100K_UP             (2 << 14)

PAD_CTL_PUS_22K_UP              (3 << 14)

PAD_CTL_PUE                     (1 << 13)

PAD_CTL_PKE                     (1 << 12)

PAD_CTL_ODE                     (1 << 11)

PAD_CTL_SPEED_LOW               (0 << 6)

PAD_CTL_SPEED_MED               (1 << 6)

PAD_CTL_SPEED_HIGH              (3 << 6)

PAD_CTL_DSE_DISABLE             (0 << 3)

PAD_CTL_DSE_260ohm              (1 << 3)

PAD_CTL_DSE_130ohm              (2 << 3)

PAD_CTL_DSE_87ohm               (3 << 3)

PAD_CTL_DSE_65ohm               (4 << 3)

PAD_CTL_DSE_52ohm               (5 << 3)

PAD_CTL_DSE_43ohm               (6 << 3)

PAD_CTL_DSE_37ohm               (7 << 3)

PAD_CTL_SRE_FAST                (1 << 0)

PAD_CTL_SRE_SLOW                (0 << 0)

3, 文档位置：

Documentation\devicetree\bindings\pinctrl\pinctrl-bindings.txt

== Introduction ==

控制引脚复用或配置参数（如上拉/下拉、三态、驱动强度等）的硬件模块被称为引脚控制器。每个引脚控制器都必须在设备树中表示为一个节点，就像其他硬件模块一样。

信号受引脚配置影响的硬件模块被指定为客户端设备。同样，每个客户端设备都必须在设备树中表示为一个节点，就像其他硬件模块一样。

Hardware modules that control pin multiplexing or configuration parameters such as pull-up/down, tri-state, drive-strength etc are designated as pin controllers. Each pin controller must be represented as a node in device tree, just like any other hardware module. Hardware modules whose signals are affected by pin configuration are designated client devices. Again, each client device must be represented as a node in device tree, just like any other hardware module.

为使客户端设备正常运行，某些引脚控制器必须设置特定的引脚配置。有些客户端设备需要单一的静态引脚配置，例如在初始化时设置。其他设备则需要在运行时重新配置引脚，例如在设备处于非活动状态时对引脚进行三态配置。因此，每个客户端设备都可以定义一组命名的状态。这些状态的数量和名称由客户端设备自己的绑定定义。

本文件中定义的通用 pinctrl 绑定为客户端设备树节点提供了一种基础架构，可将这些状态名称映射到这些状态所使用的引脚配置。

For a client device to operate correctly, certain pin controllers must set up certain specific pin configurations. Some client devices need a single static pin configuration, e.g. set up during initialization. Others need to reconfigure pins at run-time, for example to tri-state pins when the device is inactive. Hence, each client device can define a set of named states. The number and names of those states is defined by the client device's own binding. The common pinctrl bindings defined in this file provide an infrastructure for client device tree nodes to map those state names to the pin configuration used by those states.

请注意，引脚控制器本身也可能是客户端设备。例如，引脚控制器可以在加载驱动程序时设置自己的 "激活 "状态。这样就可以将电路板的静态引脚配置放在一个地方，而不是将其分割在多个客户端设备节点上。是否这样做，在某种程度上取决于单个电路板设备树文件的作者，以及该电路板使用的单个客户端设备绑定所提出的任何要求，即它们是否要求为动态引脚提供某些特定的命名状态。

Note that pin controllers themselves may also be client devices of themselves. For example, a pin controller may set up its own "active" state when the driver loads. This would allow representing a board's static pin configuration in a single place, rather than splitting it across multiple client device nodes. The decision to do this or not somewhat rests with the author of individual board device tree files, and any requirements imposed by the bindings for the individual client devices in use by that board, i.e. whether they require certain specific named states for dynamic pin configuration.

== Pinctrl client devices ==

每个客户端设备的每个引脚状态都有一个整数 ID。这些数字从 0 开始，并且是连续的。每个状态 ID 都有一个唯一属性，用于定义引脚配置。也可为每个状态分配一个名称。当使用名称时，另一个属性可将这些名称映射到整数 ID。

每个客户端设备自己的绑定决定了必须在其设备树节点中定义的状态集，以及是定义必须提供的状态 ID 集，还是定义必须提供的状态名称集。

For each client device individually, every pin state is assigned an integer ID. These numbers start at 0, and are contiguous. For each state ID, a unique property exists to define the pin configuration. Each state may also be assigned a name. When names are used, another property exists to map from those names to the integer IDs. Each client device's own binding determines the set of states that must be defined in its device tree node, and whether to define the set of state IDs that must be provided, or whether to define the set of state names that must be provided.

所需属性：

pinctrl-0：    

phandles列表，每个指向一个引脚配置节点。这些引脚配置节点必须是其配置的引脚控制器的子节点。该列表中可存在多个条目，以便配置多个引脚控制器，或由单个引脚控制器的多个节点构建状态，每个节点都是整体配置的一部分。有关这些引脚配置节点格式的详情，请参阅本文档下一节。

在某些情况下，定义一个状态但该状态为空可能是有用的。当 SoC 中使用的通用 IP 块不带引脚控制器，或引脚控制器不影响相关硬件模块时，可能需要这样做。如果该 IP 块的绑定要求存在某些引脚状态，则仍必须定义这些状态，但可以留空。

Required properties: pinctrl-0:     List of phandles, each pointing at a pin configuration node. These referenced pin configuration nodes must be child nodes of the pin controller that they configure. Multiple entries may exist in this list so that multiple pin controllers may be configured, or so that a state may be built from multiple nodes for a single pin controller, each contributing part of the overall configuration. See the next section of this document for details of the format of these pin configuration nodes. In some cases, it may be useful to define a state, but for it to be empty. This may be required when a common IP block is used in an SoC either without a pin controller, or where the pin controller does not affect the HW module in question. If the binding for that IP block requires certain pin states to exist, they must still be defined, but may be left empty.

可选属性：

pinctrl-1：    

phandles列表，每个指向针脚控制器中的一个针脚配置节点。

...

pinctrl-n：    

phandles列表，每个指向引脚控制器中的一个引脚配置节点。

pinctrl-names：    

用于分配状态的名称列表。列表项 0 定义了整数状态 ID 0 的名称，列表项 1 定义了状态 ID 1 的名称，以此类推。

Optional properties: pinctrl-1:     List of phandles, each pointing at a pin configuration node within a pin controller. ... pinctrl-n:     List of phandles, each pointing at a pin configuration node within a pin controller. pinctrl-names:     The list of names to assign states. List entry 0 defines the name for integer state ID 0, list entry 1 for state ID 1, and so on.

For example:

    /* For a client device requiring named states */

    device {

        pinctrl-names = "active", "idle";

        pinctrl-0 = <&state_0_node_a>;

        pinctrl-1 = <&state_1_node_a>, <&state_1_node_b>;

    };



    /* For the same device if using state IDs */

    device {

        pinctrl-0 = <&state_0_node_a>;

        pinctrl-1 = <&state_1_node_a>, <&state_1_node_b>;

    };



    /*

     * For an IP block whose binding supports pin configuration,

     * but in use on an SoC that doesn't have any pin control hardware

     */

    device {

        pinctrl-names = "active", "idle";

        pinctrl-0 = <>;

        pinctrl-1 = <>;

    };