UVM源代码

uvm_component源代码分析​

1.uvm_component继承自uvm_report_object,该类又继承自uvm_object, uvm_report_object和uvm_object更多的只是提供一些接口,而uvm_component中的内容才更具有实质意义。

2.UVM的树形组织结构由uvm_component中的三个属性实现:m_parent,m_children, m_children_by_handle。

每一个component在实例化时会传入parent变量,然后其m_parent就会设置为此component的parent。

每一个component在实例化时会调用其父亲的添加child函数即m_parent.m_add_child将它自己加入到父亲的m_children数组中

3.uvm_root的new函数是protected类型,get函数是static类型,get中调用new,如果之前已经new过那么直接返回该uvm_root指针。

4.top_tb initial中的run_test就是执行的uvm_root的run_test函数,其作用有两个:得到命令行中testcase的名字,然后用factory机制创建该testcase,该testcase被创建时会调用uvm_root::get,那么这是uvm_root的第一次例化,也是最后一次例化。

5.uvm_root的new函数传入parent为null,uvm_component的new中如果判断到传入的parent是null,则直接返回,不会设置m_parent和m_children。

report机制源代码分析

1.`uvm_error宏展开之后主要是两个函数:uvm_report_enabled和uvm_report_error。

2.如果是component调用`uvm_error那么执行的是component自己的​uvm_report_enabled函数,该函数在uvm_object中实现;如果是sequence等调用uvm_error,那么执行的是uvm_root中的 uvm_report_enabled函数。

3.uvm_report_error在uvm_report_object中实现,该函数会调用uvm_report_handler的report函数,该report函数又会调用uvm_report_sever的report函数。​

4.uvm_report_server这个类也是通过get_server进行单一实例化的。​

  • 0
    点赞
  • 1
    收藏
    觉得还不错? 一键收藏
  • 0
    评论
Table of Contents Articles Introduction 0 Cookbook/Introduction 0 Cookbook/Acknowledgements 1 Testbench Architecture 2 Testbench 2 Testbench/Build 9 Testbench/Blocklevel 19 Testbench/IntegrationLevel 29 Component 39 Agent 42 Phasing 48 Factory 53 UsingFactoryOverrides 56 SystemVerilogPackages 62 Connections to DUT Interfaces 65 Connections 65 SVCreationOrder 71 Connect/SystemVerilogTechniques 73 ParameterizedTests 75 Connect/Virtual Interface 78 Config/VirtInterfaceConfigDb 86 Connect/VirtInterfacePackage 90 Connect/VirtInterfaceConfigPkg 93 Connect/TwoKingdomsFactory 97 DualTop 103 VirtInterfaceFunctionCallChain 106 BusFunctionalModels 108 ProtocolModules 111 Connect/AbstractConcrete 115 Connect/AbstractConcreteConfigDB 118 Configuring a Test Environment 126 Configuration 126 Resources/config db 131 Config/Params Package 134 Config/ConfiguringSequences 139 ResourceAccessForSequences 142 MacroCostBenefit 145 Analysis Components & Techniques 146 Analysis 146 AnalysisPort 149 AnalysisConnections 152 MonitorComponent 158 Predictors 161 Scoreboards 163 MetricAnalyzers 170 PostRunPhases 172 Matlab/Integration 175 End Of Test Mechanisms 183 EndOfTest 183 Objections 185 Sequences 188 Sequences 188 Sequences/Items 193 Transaction/Methods 195 Sequences/API 200 Connect/Sequencer 204 Driver/Sequence API 206 Sequences/Generation 213 Sequences/Overrides 221 Sequences/Virtual 223 Sequences/VirtualSequencer 231 Sequences/Hierarchy 237 Sequences/SequenceLibrary 242 Driver/Use Models 246 Driver/Unidirectional 247 Driver/Bidirectional 250 Driver/Pipelined 255 Sequences/Arbitration 267 Sequences/Priority 276 Sequences/LockGrab 277 Sequences/Slave 284 Stimulus/Signal Wait 290 Stimulus/Interrupts 294 Sequences/Stopping 301 Sequences/Layering 302 Register Abstraction Layer 308 Registers 308 Registers/Specification 315 Registers/Adapter 317 Registers/Integrating 321 Registers/Integration 327 Registers/RegisterModelOverview 332 Registers/ModelStructure 334 Registers/QuirkyRegisters 344 Registers/ModelCoverage 349 Registers/BackdoorAccess 354 Registers/Generation 357 Registers/StimulusAbstraction 358 Registers/MemoryStimulus 370 Registers/SequenceExamples 375 Registers/BuiltInSequences 382 Registers/Configuration 386 Registers/Scoreboarding 389 Registers/FunctionalCoverage 395 Testbench Acceleration through Co-Emulation 401 Emulation 401 Emulation/SeparateTopLevels 404 Emulation/SplitTransactors 410 Emulation/BackPointers 415 Emulation/DefiningAPI 419 Emulation/Example 422 Emulation/Example/APBDriver 430 Emulation/Example/SPIAgent 435 Emulation/Example/TopLevel 441 Debug of SV and UVM 444 BuiltInDebug 444 Reporting/Verbosity 455 UVM/CommandLineProcessor 460 UVM Connect - SV-SystemC interoperability 464 UvmConnect 464 UvmConnect/Connections 466 UvmConnect/Conversion 468 UvmConnect/CommandAPI 472 UVM Express - step by step improvement 476 UvmExpress 476 UvmExpress/DUT 481 UvmExpress/BFM 485 UvmExpress/WritingBfmTests 490 UvmExpress/FunctionalCoverage 498 UvmExpress/ConstrainedRandom 503 Appendix - Deployment 516 OVM2UVM 516 OVM2UVM/DeprecatedCode 527 OVM2UVM/SequenceLibrary 528 OVM2UVM/Phasing 530 OVM2UVM/ConvertPhaseMethods 535 UVC/UvmVerificationComponent 537 Package/Organization 548 Appendix - Coding Guidelines 555 SV/Guidelines 555 UVM/Guidelines 569 Appendix - Glossary of Terms 579 Doc/Glossary 579

“相关推荐”对你有帮助么?

  • 非常没帮助
  • 没帮助
  • 一般
  • 有帮助
  • 非常有帮助
提交
评论
添加红包

请填写红包祝福语或标题

红包个数最小为10个

红包金额最低5元

当前余额3.43前往充值 >
需支付:10.00
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明:

1.余额是钱包充值的虚拟货币,按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载,可以购买VIP、付费专栏及课程。

余额充值