四、在Xilinx FPGA上使用Cortex M1 软核——固化Cortex-M1程序

最新推荐文章于 2024-09-18 15:28:48 发布

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最新推荐文章于 2024-09-18 15:28:48 发布

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分类专栏： FPGA软核文章标签： FPGA Cortex-M1 Keil

本文链接：https://blog.csdn.net/lai823177557/article/details/100051308

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本文详细介绍了如何在Xilinx FPGA上固化Cortex-M1程序，包括生成Memory Map Information (MMI)文件、CM1 elf文件，以及融合bit文件的步骤。文中提到了修改ARM提供的例程以适应自定义FPGA工程，并且在Keil中设置自动转换脚本，确保每次编译后能生成所需文件。

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在Xilinx FPGA上使用Cortex M1 软核——固化Cortex-M1程序

本文的硬件（FPGA）工程和软件代码、脚本均参考ARM提供的例程。

本文使用的FPGA工程：

https://download.csdn.net/download/lai823177557/11580459

本文使用的Keil工程：

https://download.csdn.net/download/lai823177557/11607865

生成Memory Map Information(MMI)

MMI简介

MMI是融合CM1程序文件(.elf)和bit流文件时的说明文件。官方文档对MMI文件的介绍：
在这里插入图片描述
根据文档描述，每次生成新的bit流文件后都需要重新生成MMI文件。

生成脚本

ARM例程中提供了生成脚本，但是不能原封不动地用于之前建立的FPGA工程，故做了3处修改：

生成文件的文件名(mmi_file 变量)
改为自己喜欢的名字：cortex_m1.mmi。
目标器件(part 变量)
改为开发板的器件型号：xc7z020clg484-1
AddressSpace名称(AddressSpace Name)
将AddressSpace Name改为和工程匹配，名称来源：
打开FPGA工程的RTL ANALYSIS，依次展开直到找到M1软核。展开软核知道找到u_x_itcm，选中它即可找到其完整名称。

以下是使用ARM例程中修改后的脚本：

# -----------------------------------------------------------------------------
#  The confidential and proprietary information contained in this file may
#  only be used by a person authorised under and to the extent permitted
#  by a subsisting licensing agreement from ARM limited.
#
#             (C) COPYRIGHT 2018 ARM limited.
#                 ALL RIGHTS RESERVED
#
#  This entire notice must be reproduced on all copies of this file
#  and copies of this file may only be made by a person if such person is
#  permitted to do so under the terms of a subsisting license agreement
#  from ARM limited.
#
#       SVN Information
#
#       Checked In          : $Date$
#
#       Revision            : $Revision$
#
#       Release Information : Cortex-M1 DesignStart-r0p1-00rel0
#
# -----------------------------------------------------------------------------
#  Project : Cortex-M1 Arty A7 Example design with V2C-DAPLink adaptor board
#
#  Purpose : Script to get ITCM BRAM locations
#            MMI format from following two articles
#
# https://www.xilinx.com/support/answers/63041.html
# https://forums.xilinx.com/t5/Vivado-TCL-Community/export-BRAM-locations-into-MMI-file/td-p/771221
# -----------------------------------------------------------------------------

# Set MMI output file name
set mmi_file "cortex_m1.mmi"
set part     "xc7z020clg484-1"

# Function to swap bits
proc swap_bits { bit } {

    if { $bit > 23 } {return [expr {24 + (31 - $bit)}]}
    if { $bit > 15 } {return [expr {16 + (23 - $bit)}]}
    if { $bit > 7  } {return [expr {8  + (15 - $bit)}]}
    return [expr {7 - $bit}]
}

# If run from batch file, will need to open project, then open the run
# open_run impl_1

# Find all the ITCM RAMs, place in a list
set itcm_ram [get_cells -hier -regexp {.*itcm.*ram_block_reg.*} -filter {REF_NAME =~ RAMB36E1}]

# Vivado appears to read the memories in their actual bit order
# However update_mem amongst its very many failings doesn't support endianness, even though you specify it in the file!
# It also pays no attention to the bit_lane definition, it does the conversion based on the order memories are defined
# in the file!  Not clear what the MMI file does achieve!

# So go through and reverse each block of 4 memories
if { [expr {