目录
Worst Case Circuit Analysis (WCCA)
Worst Case Circuit Analysis Application Guidelines 1993
How to avoid design problems by using worst case analysis calculations
Electrical Design Worst-Case Circuit Analysis: Guidelines and Draft Standard (REV A)
Design for Reliability Techniques — Worst Case Circuit Stress Analysis
Introduction to Worst Case Circuit Analysis For the Aerospace Engineer
Worst Case Circuit Analysis (WCCA)
wcca.pdf (les-electroniciens.com)
Worst Case Circuit Analysis Application Guidelines 1993
Reliability Analysis Center (RAC) o 201 Mill St. Rome, NY 13440 o (315) 337-0900
RAC DOD Reliability Analysis & WCA Guidelines APR1994.pdf (astrospaceinc.com)
How to avoid design problems by using worst case analysis calculations
Louis Diana FAE SMTS Texas Instruments
How to Avoid Design Problems by Using Worst Case Analysis Calculations
Electrical Design Worst-Case Circuit Analysis: Guidelines and Draft Standard (REV A)
Microsoft Word - 7 19 TOR-2013-00297.docx (nasa.gov)
June 3, 2013 Brian A. Lenertz Electronics and Power Systems Department Electronics Engineering Subdivision Electronics and Sensor Division Prepared for: Space and Missile Systems Center Air Force Space Command 483 N. Aviation Blvd. El Segundo, CA 90245-2808
Design for Reliability Techniques — Worst Case Circuit Stress Analysis
Design for Reliability Techniques — Worst Case Circuit Stress Analysis (advancedenergy.com)
Figure 1 – Worst Case Circuit Stress Analysis process flow, adapted from [2, 3]
Introduction to Worst Case Circuit Analysis For the Aerospace Engineer
Microsoft Word - WCCA Course Description - 2 Day Class.doc (aeng.com)
Monte Carlo Analysis in Excel A Design Tool For The Component Engineer Chuck Johnson 24 January 2014
Microsoft Word - MonteCarloAnalysis.doc (componentsengineering.com)
Worst Case Circuit Analysis - An Overview
(E 1 e c t r o n i c P art s/C i r cu i t s To 1 er an ce An a 1 y s i s)
The first questions to be addressed are "What is Worst Case Analysis ?" and "Why do it?"
Figure 1.0 sums up the "What". The "Why" is three fold:
1 - To design reliability INTO hardware for long term trouble-free field operation - reliability against drift.
2 - WCCA is normally a contract requirement on most Hi-Re1 Military and Space Programs.
3 - WCCA is "THE WAY" to design electronic circuits - given a Worst Case Part Variations data base, WCCA is relatively easy for circuit designerdanalysts as well as an economical approach and if the circuit "passes" we're finished our job and should get through test easier than normal.
The next questions to be answered are "How does WCCA fit into a Reliability Program?", "What is the Value of WCCA?" and "What is the Return on Investment?" Figures 2 and 3 answer the first two questions
BUT - will the circuit survive the real world environments to which it will be exposed during its mission, in the Worst Case? What is that were looking for.
For Worst Case Circuit Analysis, it is assumed that when you select a part from stock, it is at its initial tolerance value already, which it may or may not be but it is certainly possible and we are creating a Worst Case Scenario. Next we assume for WCCA, that all parts in a circuit are at their max drift values (on top of initial tolerance). SIMULTANEOUSLY. Now, admittedly, this is stretching things but it is a Possible scenario in the worst case. A more likely scenario, is that some combinations of parts will be at drift values beyond their initial tolerance and probably they will not all be at the maximums possible drift. Survival in a worst case scenario of all parts being at their MAX drift values simultaneously, assures survival in any scenario of possible combinations of part variations to any degree. If you analytically calculate circuit performance under the Worst Case Scenario described above and still have margin in your circuit relative to not exceeding the specified upper and lower performance tolerance limits, you will have a rock solid design against part variations. This is the philosophy of Worst Case Circuit Analysis and this is how electronic circuits and systems are designed for most military and aerospace applications requiring high reliability.
WORST CASE CIRCUIT ANALYSIS DESIGNS RELIABILITY INTO ELECTRONIC CIRCUITS.
Figure 7 shows a comparison of some typical piece part initial tolerance values vs. the Worst Case limits. This table was compiled from an actual Worst Case Data Base for a major commercial satellite program. The Worst Case limits shown were used in the actual designs of the satellite which has been operating successfully for approximately five years with five to go to complete its mission.
The actual task of developing the Worst Case Parts Data Base is a significant part of the work and cost involved in performing a Worst Case Circuit Analysis. The goal of this task is to develop a document consisting of Worst Case Data Base (WCDB) Worksheets, as shown in Figure 8, for all electronic parts utilized on a program. There worksheets must be filled out by an engineer experienced with electronic parts. These worksheets, serve as a quantitative assessment of the dominant sources of variability for each part type for the environments and life of the program mission.
The Worst Case Data Base will serve as a program uniform reference source to assure that all Worst Case Circuit Analyses performed on the program (and there are many on large programs) utilize identical source data. You do not want all design engineers on a program developing their own W.C. Data Base. Once developed within a company, the Worst Case Data Base can be maintained, expanded and tailored for usage on other programs. The "how to develop" aspects of a Worst Case Data Base takes approximately four hours in the WCCA Training Course mentioned in the Summary at the beginning of this paper and hence is far beyond the scope of this paper which is only a brief overview of a complex task. At this point the reader should simply understand what the Worst Case Date Base is and the paramount need for its development and availability to all design engineers and analysts on a program who are involved with Worst Case Circuit Analysis.
One final important consideration in the development of a Worst Case Data Base which the reader should be aware of, is the manner in which we can statistically combine the individualized part variations (temp., life, radiation etc.), once the drift limits have been determined, to arrive at the WC MAX and WC MIN for the parameters. Looking of Figure 8, notice that there are columns for entering the variations due to the environments as either a "BIAS" variation or a "RANDOM" variation. The manner in which these variations are combined becomes a program choice if not dictated by the customer, and it does indeed make a difference. Figure 9 above illustrates examples of bias and random variations. A bias variation simply means that the parameter changes (increases or decreases) in the same direction as the environment changes (increases or decreases), e.g. if temperature increases, the part parameter value increases (positive temperature coefficient) and vice versa. It's predictable. A random variation is totally unpredictable in which way the part value changes regardless of which direction the environment changes. These bias and random variations can be different for different part types, e.g. a particular environment change may cause a bias change of one part parameter type but a random change for another. Some drift effects may even be a combination of bias and random variations (e.g. Temp. Coef. = 100 _+ 10 PPM/OC).
The question being posed is "How do we combine Bias and Random Variations to arrive at the WC MAX and the WC MIN part parameter values. One acceptabIe method, and the recommended method unless dictated otherwise, on numerous military programs is as shown in equations 2 and 3 i.e. add biases algebraically and Root-Sum-Square (RSS) the random variations. RSS is a statistically correct manner to combine random variables.
Some agencies and prime contractors require that the random terms be treated as biases and hence added algebraically as shown in equation 4 and 5.
This method creates a worst, worst case scenario and is known as the Extreme Value Method (EVA) for combining part variations. Later, we will also discuss EVA and RSS analysis of circuits for WCCA.
2.2.2 OTHER CONTRIBUTING FACTORS TO A WORST CASE SCENARIO
Additional factors contributing to a Worst Case Scenario which must be taken into account are the interface connections, i.e. the bodcircuit input power, input signals and loads, all of which have specified tolerance limits around the nominal values. In performing a WCCA, all these interface values must be set to their limit and in the direction (k) which causes the biggest problem for the circuit attribute under analysis.
2.3 SENSITIVITY ANALYSIS
Referring back to equation #1 for the gain of the Band-Pass Filter, we stated that substituting the nominal part values for all the R's and C's into equation #1 would yield a gain of 11.08 V/V and that substituting the initial tolerance values for all the R's and C's into equation #1 would yield a gain of 7.84 V/V. Using nominal values, it was a straight forward substitution of the part values. However, using initial tolerance values, which have an algebraic sign (k) with each part value, we had to make a choice of either the "+" value or the "-'I value for each part to drive the gain to a minimum. The problem arises as to what combination of the "parts" MAX and MIN values will yield the circuit parameter MAX and MIN values? We must determine the circuit sensitivity direction response (i.e. circuit value increases or decreases) for the directional change (+ or -) for each part. Worst Case Circuit Analysis requires performing this same circuit "Sensitivity Analysis" since we are dealing with part MAX and MIN values. This analysis is absolutely mandatory since one wrong sign for any part will totally void the Worst Case solution. The classical solution for determining the sign of the sensitivity for each part when solving for either the circuit parameter Worst Case MAX or Worst Case MIN is to take the partial derivative of the circuit equation with respect to each part individually. That will yield the "sign" of the part which must be used. For the Band-Pass Filter, the equation is
Fortunently, many circuit simulators allow one to perform this sensitivity analysis. If such a program is not immediately available, there are other means to determine sensitivity e.g. substitute small incremental changes in each part individually (holding all other part values constant) and solve the circuit equation to see in which direction it changes (increases or decreases). You could also sweep the gain over a fairly wide range of each part value and display these graphically as shown in figure 10.
Notice in figure 10 that as C1 increases the circuit gain (Afo) increases (positive sensitivity for Cl) and as C2 increases the gain Afo decreases (negative sensitivity for C2).
2.4 WORST CASE EVALUATION OF THE BAND-PASS FILTER
To evaluate the Worst Case minimum gain at the center frequency (Afo) for the Band-Pass Filter (Figure 4 and equation l), we need to determine the WC MAX and WC MIN for the R's and C's. This was done and is illustrated in figure 11.
All variations were treated as biases. Note that Vi and Vo of Figure 4 do not enter into equation 1. If they did we would have to set them at their max or min tolerance also. We now must determine the directional (+ or -) sensitivity of each part. This was doing using a simulator which performed sensitivity analysis. See figure 12.
Substituting the WC MAX and MIN values into equation 1 for Afo and in the proper direction dictated by the sensitivity analysis yields Afo = 5.76 V/V which fails the minimum gain requirement of 7.0 VN by quite a bit. The Afousing all nominal or all initial tolerance values passed the requirement of 7.0 V/V. This was a real example from an actual WCCA. See figure 13.
Notice the significant difference between the nominal solution (11.08 VN) and the initial tolerance (7.84 VN) and the Worst Case (5.76 V/V) solutions.
Note that we do not have to drive all the R's and C's to their Worst Case limits to cause Afo to fall below 7.0 VN, Afo WC = 5.76 VN. There are numerous combination of only several parts exceeding their initial tolerance which would cause the gain to fall below 7.0 VN.
The circuit approach taken, i.e. substitution of piecepart WC MAX and WC h4IN values into the circuit equation is called the Extreme Value Analysis (EVA). there are two other circuit techniques which can be utilized for a Worst Case Circuit Analysis. These are discussed briefly in the next section.
2.5 Alternate Techniques for performing Worst Case Circuit Analysis (WCCA)
Two alternate approaches for performing a WCCA will now be discussed. They are the ROOT-SUM-SQUARE (RSS) Analysis and the Monte Carlo Analysis (MCA). Both techniques are valid approaches. These two subjects consume about an hour and a half in the WCCA Training Course mentioned in the Summary and hence can be given only a brief treatment herein. Both techniques yield results which are more optimistic then the Extreme Value Analysis (EVA) solution. Discussion of both techniques herein use an example of a simple voltage divider circuit with four resistors, (RI + R4) and two internal voltages sources (VI and V2). The equation for the output voltage is given in equation 7.
ROOT-SUM-SQUARE (RSS)
RSS is the statistical technique for combining standard deviations (a). The RSS approach is based on the “Law of large numbers” (Central Limit Theorem) which states that if a large number of variables are statistically combined the resulting distribution is a normal distribution independent of the form of the distributions of the variables which are combined. The determination of the standard deviation (0) of a normal distribution for any circuit attribute by mathematically combining the standard deviations of each piece-part based on the magnitude of the sensitivity of the circuit attribute to the value of the piece-part is therefore a valid statistical approach. The normal distribution of the output curve for Vo has a standard distribution related to the standard deviations of the part parameters as shown in equation 8. The standard deviation of the output variable Vo will be identified as OT . Multiplying the solution of equation 8 by three will yield us the 30 (99.7%) value for Vo which is herein defined as the Worst Case value.
MONTE CARLO ANALYSIS (MCA)
The Monte Carlo Analysis is hereby defined as: The empirical determination of the statistical distribution of any circuit attribute by the repeated evaluation of that attribute under various circuit conditions in which the values of each piece-part are randomly selected. The MCA process is illustrated in Figure 14.
From the area of a histogram, one can now calculate the circuit Mean and Standard Deviation (0). The 30 (99.7%) value is again defined as the Worst Case Value. Fortunently, there are numerous simulators available which perform a Monte Carlo Analysis
CONCLUSIONS
Electronic production hardware requiring reliable operation over a period of time should never be built based on circuits which were designed utilizing only the nominal or initial tolerance values of the piece parts. Part values will drift over the life and environments of a mission after being assembled onto circuit boards. Worst Case Circuit Analysis is not a major deviation from the classical circuit desigdanalysis which electronic engineers normally perform in their daily work, given that the Worst Case Part Variations are developed or made available to the designer. In general, the required information to develop a Worst Case Parts Data Base (analytically) is available or can be extrapolated or estimated with rationale. Worst Case Circuit Analysis on electronic circuits and systems has been performed for many years and the approach and analysis methods described herein have been acceptable to government agencies and major prime contractors.
ACKNOWLEDGMENT
We wish to acknowledge the efforts of Mr. Harry Peacock, who, while serving as Technical leader for Reliability Analysis for NASA's Jet Propulsion Laboratories (JPL), personally managed and contributed significantly to the modification of Design and Evaluation, Inc.'s "Worst Case Circuit Analysis" Training Course while it was being upgraded under contract to JPL.
REFERENCES 1. Design and Evaluation, Inc., 'I Worst Case Circuit Analysis Training Course, Design and Evaluation, Inc., Laurel Springs, New Jersey, 1989. Taught at NASA's Jet Propulsion Laboratories, NASA Johnson Space Center, NASA Marshall Space Flight Center, NASA Lewis Research Center, Harry Diamond Labs, Rocketdyne, Canoga Park, Ca, Ford Aerospace (Loral) Palo Alto, Ca., Martin Marietta Corp., Orlando, Fl., GE Aerospace (Lockheed Martin) Camden, NJ, and Syracuse, NY, Honeywell, Phoenix, Az and Minn, Minn, Ford Motor CO, Dearborn, Mi and numerous seminars conducted by D&E open to the public since 1989.
2. Design and Evaluation, Inc, "Worst Case Circuit Analysis" Handbooks (5 Volumes) 1989, Design and Evaluation, Inc., Laurel Springs, NJ
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