AG1KLP AGM FPGA介绍

AG1KLP family provides low cost, ultra-low power , SRAM-based FPGAs, with density is ranging from 640 up to1280 Look-Up Tables(LUTs). The devices feature Embedded Block Memory (EBR), Distributed RAM, and Phase Locked Loops (PLLs), while offering small footprint package WLSCP and ucBGA. The devices are designed for ultra low power and cost while providing programmable solutions for a wide range of applications, especially in consumer and mobile device products.

Features

• Low power and low cost FPGA.

• Flexible logic architecture based on LUT.

• Ultra-low power, as low as 50 μA standby typical Icc (1.2V Vcc).

• Broad range of package options, small footprint package for consumer and mobile application.

• Provides PLL per device provide clock multiplication and phase shifting

• 3.3-V, 2.5-V, 1.8-V, 1.5-V LVCMOS and LVTTL standards

• Flexible device configuration through SPI interface

• Table 1-1 Shows AG1KLP family features

Feature	AG1KLP
LUTs	640, 1280
Distributed RAM(Kbits)	10
EBR SRAM	68
Maximum User I/O pins	40
Number of PLLs	1
Package	16 pins WLSCP 36 pins ucBGA 49 pins ucBGA 48 pins QFN

AG1KLP是低成本，超低功耗，基于SRAM的一款FPGA系列。其LUT数量从640到1280，带有嵌入式块存储器（EBR），分布式RAM和锁相环。封装形式有WLSCP封装和ucBGA封装。AG1KLP主要用于低功耗低成本的应用场景，比如消费类电子和移动设备产品。

特点：

• 低功耗低成本FPGA
• 基于LUT的灵活的逻辑架构
• 超低功耗，待机电流低至50uA
• 多种封装选择，小封装，适用于消费电子和移动设备
• 带锁相环用于时钟倍频和相位偏移
• 3.3V, 2.5V, 1.8V, 1.5V LVCMOS和LVTTL标准
• 通过SPI接口可以对设备方便的配置
• 特点参见表格1-1

特点	AG1KLP
LUTs	640，1280
分布式RAM(kbits)	10
嵌入式块RAM (kbits)	68
最多用户I/O引脚	40
锁相环数量	1
封装	16引脚  WLCSP（先切割再封装） 36引脚 ucBGA 49引脚 ucBGA 48引脚 QFN

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