PL通过EMIO方式外接PHY芯片的实验

最新推荐文章于 2023-12-06 13:10:29 发布

mcupro

最新推荐文章于 2023-12-06 13:10:29 发布

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分类专栏： FPGA ZYNQ7 总结和计划

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总结和计划

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ZYNQ7

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首先设置EMIO方式引出ETHE1

之后我们看到ZYNQ模块生长出了GMII接口如下图：

主要是三部分：

1，左边的ENET1_EXT_INITN是外部中断的输入。

2，MIO主控部分，时钟是输出的，数据是双向的，所以有一个方向选择T。我们可以简单做一个三态门实现。

3，GMII接口部分[注1]。

生成HDL文件之后接着我们从原理图上找到这些引脚的对应，做成XDC约束文件，主要部分如下：

#set_property  -dict {PACKAGE_PIN Y11   IOSTANDARD LVCMOS33} [get_ports pmod_ja1];    
 

set_property  -dict {PACKAGE_PIN AD10    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[0]}];    
set_property  -dict {PACKAGE_PIN AC12    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[1]}];    
set_property  -dict {PACKAGE_PIN AD11    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[2]}];    
set_property  -dict {PACKAGE_PIN AD13    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[3]}];    
set_property  -dict {PACKAGE_PIN AB15    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[4]}];    
set_property  -dict {PACKAGE_PIN AB14    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[5]}];    
set_property  -dict {PACKAGE_PIN AE16    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[6]}];    
set_property  -dict {PACKAGE_PIN AE15    IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_RXD[7]}]; 

set_property  -dict {PACKAGE_PIN  AD14  IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[0]}];    
set_property  -dict {PACKAGE_PIN  Y12   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[1]}];    
set_property  -dict {PACKAGE_PIN  Y11   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[2]}];    
set_property  -dict {PACKAGE_PIN  W13   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[3]}];    
set_property  -dict {PACKAGE_PIN  Y13   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[4]}];    
set_property  -dict {PACKAGE_PIN  W16   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[5]}];    
set_property  -dict {PACKAGE_PIN  W15   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[6]}];    
set_property  -dict {PACKAGE_PIN  Y17   IOSTANDARD LVCMOS33} [get_ports {ENET1_GMII_TXD[7]}]; 

set_property  -dict {PACKAGE_PIN   AC14  IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_TX_CLK];    
set_property  -dict {PACKAGE_PIN  AC13   IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_RX_CLK];
    
set_property  -dict {PACKAGE_PIN  AE10   IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_RX_DV];    
set_property  -dict {PACKAGE_PIN  Y10   IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_RX_ER];   
 
set_property  -dict {PACKAGE_PIN   AA10  IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_TX_EN];   
set_property  -dict {PACKAGE_PIN  AA17   IOSTANDARD LVCMOS33} [get_ports ENET1_GMII_TX_ER];   

set_property  -dict {PACKAGE_PIN   Y15  IOSTANDARD LVCMOS33} [get_ports ENET1_MDIO_MC];   
set_property  -dict {PACKAGE_PIN   Y16  IOSTANDARD LVCMOS33} [get_ports ENET1_MDIO_MD];

注1 ：关于GMII接口可以学习https://wenku.baidu.com/view/6d03c124bd64783e09122bab.html