74衍生系列芯片型号简介

• Bipolar双极型

• • 74 – Standard TTL. the original logic family had no letters between the “74” and the part number. 10 ns gate delay, 10 mW dissipation, 4.75–5.25 V, released in 1966.^[7]
  • 74L – Low-power. Larger resistors allowed 1 mW dissipation at the cost of a very slow 33 ns gate delay. Obsolete, replaced by 74LS or CMOS technology. Introduced 1971.^[8]
  • 74H – High-speed. 6 ns gate delay but 22 mW power dissipation. Used in 1970s era supercomputers. Still produced but generally superseded by the 74S series. Introduced in 1971.
  • 74S – High-speed Schottky. Implemented with Schottky diode clamps at the inputs to prevent charge storage, this provides faster operation than the 74 and 74H series at the cost of increased power consumption and cost. 3 ns gate delay, 20 mW dissipation, released in 1971.
  • 74LS – Low-power Schottky. Implemented using the same technology as 74S but with reduced power consumption and switching speed. Typical 10 ns gate delay, a remarkable (for the time) 2 mW dissipation, 4.75–5.25 V.
  • 74AS – Advanced Schottky, the next iteration of the 74S series with greater speed and fan-out despite lower power consumption. Implemented using the 74S’s technology with “miller killer” circuitry to speed up the low-to-high transition. 1.7 ns gate delay, 8 mW, 4.5–5.5 V.
  • 74ALS – Advanced low-power Schottky. Same technology as 74AS but with the speed/power tradeoff of the 74LS. 4 ns, 1.2 mW, 4.5–5.5 V.
  • 74F – Fast. Fairchild’s version of TI’s 74AS. 3.4 ns, 6 mW, 4.5–5.5 V. Introduced in 1978.

• CMOS

• • C – CMOS 4–15 V operation similar to buffered 4000 (4000B) series.
  • HC – High-speed CMOS, similar performance to LS, 12 ns. 2.0–6.0 V.
  • HCT – High speed, compatible logic levels to bipolar parts.
  • AC – Advanced CMOS, performance generally between S and F.
  • ACQ – Advanced CMOS with Quiet outputs.
  • AHC – Advanced high-speed CMOS, three times as fast as HC, tolerant of 5.5V on input.
  • ALVC – Low-voltage – 1.8–3.3 V, time Propagation Delay (TPD) < 3 ns at 3.3 V.
  • ALVT – Low-voltage – 2.5–3.3 V, 5 V tolerant inputs, high current ≤ 64 mA, TPD < 3 ns at 2.5 V.
  • AUC – Low-voltage – 0.8–2.5 V, TPD < 2.5 ns at 1.8 V.
  • AUP – Low-voltage – 0.8–3.6 V (3.3 V typically), TPD 15.6/8.2/4.3 ns at 1.2/1.8/3.3V, partial power-down specified (IOFF), inputs protected.
  • AVC – Low-voltage – 1.8–3.3 V, TPD < 3.2 ns at 1.8 V, bus hold, IOFF.
  • FC – Fast CMOS, performance similar to F.
  • LCX – CMOS with 3 V supply and 5 V tolerant inputs.
  • LV – Low-voltage CMOS – 2.0–5.5 V supply and 5 V tolerant inputs.
  • LVC – Low voltage – 1.65–3.3 V and 5 V tolerant inputs, TPD < 5.5 ns at 3.3 V, TPD < 9 ns at 2.5 V.
  • LV-A – 2.5–5 V, 5 V tolerant inputs, TPD < 10 ns at 3.3 V, bus hold, IOFF, low noise.
  • LVT – Low-voltage – 3.3 V supply, 5 V tolerant inputs, high output current < 64 mA, TPD < 3.5 ns at 3.3 V, IOFF, low noise.
  • LVQ – Low-voltage – 3.3 V.
  • LVX – Low-voltage – 3.3 V with 5 V tolerant inputs.
  • VHC – Very-high-speed CMOS – “S” performance in CMOS technology and power.

• BiCMOS

• • BCT – BiCMOS, TTL-compatible input thresholds, used for buffers.
  • ABT – Advanced BiCMOS, TTL-compatible input thresholds, faster than ACT and BCT.

  摘自英文维基百科