SystemVerilog：Chapter 3，Net and Variable types_2

3.2 Literal values (numbers)

3.2.2 Vector fill literal values

System Verilog provides a special form of unsized literal integers that sets all bits of a vector of any size to 0, 1, X or Z.

An example of using the vector fill literal integers is:

always_ff @(posedge elk)
    if (！setN) // active low set
        q <= '1; // set all bits of q to 1, regardless of size
    else
        q <= d;

3.2.3 Floating-point literal values (real numbers)

SystemVerilog refers to floating-point values as real numbers. Real numbers are represented using 64-bit double-precision floating point.

Such as : 3.1567 ; 5.0 ; 0.5 .