1.Wire
module top_module (
input in,
output out);
wire w;
assign w=in;
assign out=w;
endmodule
2.GND
module top_module (
output out);
assign out=1'b0;
endmodule
3.NOR
module top_module (
input in1,
input in2,
output out);
assign out=~(in1|in2);
endmodule
4.Another gate
module top_module (
input in1,
input in2,
output out);
assign out=in1&(~in2);
endmodule
5.Two gates
module top_module (
input in1,
input in2,
input in3,
output out);
assign out=in3^(~(in1^in2));
endmodule