system verilog MATLAB学习笔记

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最新推荐文章于 2024-05-08 18:37:07 发布

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分类专栏： Verilog 文章标签： verilog

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system verilog 学习笔记

system verilog 学习笔记
MATLAB

initial begin:CLK_SYS
  sys_clk = 0;
  clock_create( 250e6 , sys_clk );
end
task automatic clock_create ( input int unsigned freq , ref reg clk );
  real  half_clk ;
  clk = 0;
  half_clk = 500000000.0 / freq ;
  forever #half_clk clk = ~clk ;  
endtask

for ( int i = 0 ; i < 2 ; i++ ) begin
    for ( int j = 3 ; j < 19 ; j++ ) begin
      FILE_NAME_SOURCE = $sformatf("./sourcedata/DATA1/DAT1_%1d_%1d.txt",i,j);
      FILE_NAME_OUR_C  = $sformatf("./sourcedata/DATA2/DAT2__%1d_%1d_cos.txt",i,j);
      FILE_NAME_OUT_S  = $sformatf("./sourcedata/DATA2/DAT2__%1d_%1d_sin.txt",i,j);
      counter          = 0;
      counter_end      = 0;
      fd_source        = $fopen ( FILE_NAME_SOURCE , "r" );
      fd_cos_dat       = $fopen ( FILE_NAME_OUR_C  , "w" );
      fd_sin_dat       = $fopen ( FILE_NAME_OUT_S  , "w" );
      fd_ddc_cos       = $fopen ( "./fd_ddc_cos.txt"  , "w" );
      fd_ddc_sin       = $fopen ( "./fd_ddc_sin.txt"  , "w" );
      $display("----DAT1_%1d_%1d.txt:START",i,j);
    end
end

MATLAB

for j = 0 : 1 : 1;
    for i = 1 : 1 : 18
        file_name = sprintf( './sourcedata/DATA3/DAT3_%d_%d_0.txt' , j , i );
        load (file_name);
        file_name = sprintf( './sourcedata/DATA3/DAT3_%d_%d_1.txt' , j , i );
        load (file_name);
    end
end
for i = 1 : 1 : 18
    data_0_0(:,i) = eval(['DAT3_0_',int2str(i),'_0']);  
    data_0_1(:,i) = eval(['DAT3_0_',int2str(i),'_1']); 
    data_1_0(:,i) = eval(['DAT3_1_',int2str(i),'_0']); 
    data_1_1(:,i) = eval(['DAT3_1_',int2str(i),'_1']);  
end