Xilinx的FPGA手册中关于如何Booting RFSoCsZynq

启动过程

首先根据根基mode pins来选择启动方式，SPI还是JTAG等等
然后执行片上ROM中的代码 并且从SPI 或JTAG等这些boot device中拷贝First Stage Boot Loader （FSBL）到片上内存中
最后，处理器星星FSBL，FSBL可以初始化PS的启动或者导入PL配置。FSBL可以导入用户应用或者可选的second stage boot loader

原文：

UltraScale+ RFSoCs use a multi-stage boot process that supports both a non-secure and a secure boot. The PS is the master of the boot and configuration process. For a secure boot, the AES-GCM, SHA-3/384 decryption/authentication, and 4096-bit RSA blocks decrypt and authenticate the image.

Upon reset, the device mode pins are read to determine the primary boot device to be used: NAND, Quad-SPI, SD, eMMC, or JTAG. JTAG can only be used as a non-secure boot source and is intended for debugging purposes. One of the CPUs, Cortex-A53 or Cortex-R5, executes code out of on-chip ROM and copies the first stage boot loader (FSBL) from the boot device to the on-chip memory (