基于FPGA的充电系统

2019年6月19日晚，重写了一版充电系统，此设计基于铱元素科技的EGO1FPGA开发板，采用Xilinx的Xc7a35tcsg324-1芯片，用Verilog编写，借助了数据包的思想：

module charger_top(clk,dula_ch,wela_ch,wela_coin,dula_coin,channel,control,rest_n,coin_in,ok,led);
input clk;
input rest_n;
input coin_in;
input [3:0] channel;
input ok;
output led;
output [7:0] dula_ch;
output [3:0] wela_ch;
output [7:0] dula_coin;
output [3:0] wela_coin;
output [3:0] control;
wire [7:0] num;
wire [3:0]valid_coin;
wire [2:0] frame;
check_coin coin (.clk(clk),.rest_n(rest_n),.coin_in(coin_in),.valid_coin(valid_coin),.num(num),.channel(channel),.frame(frame));

coin_display coin_show (.clk(clk),.rest_n(rest_n),.num(num),.dula_coin(dula_coin),.wela_coin(wela_coin));


silly_ok oh_ok (.clk(clk),.ok(ok),.led(led));

wire [3:0] times1,times2,times3,times4;

wire valid_coin1,valid_coin2,valid_coin3,valid_coin4;

channel1_top ch1 (.clk(clk),.rest_n(rest_n),.info(frame),.control(control[0]),.num(num),.valid(valid_coin1),.tim