环境:PYNQ、Ultra96 V2、Vivado2018.3
具体流程:
结构简图(https://blog.csdn.net/rzjmpb/article/details/50365915# )
(1) 创建Vivado工程,选择Ultra 96板;
(2) Create Block Design;
(3) Add ZYNQ,Run Block Automation;
(4) 添加AXI_BRAM_CTRL x2(一个write、一个read), 并把number of BRAM interfaces 修改成1;
(5) 添加Block Memory Generator,双击Block Memory Generator ,修改Memory Type(True Dual Port RAM);
(6) 点击run Connection Automation,把axi_bram_ctrl_1的S_AXI端口的连接目标修改为M_AXI_HPM1_FPD(axi_bram_ctrl_0的S_AXI端口的连接目标默认为为M_AXI_HPM0_FPD);
(7) 生成后的Diagram如下:
(8&