Lin-Analyzer: A High-level Performance Analysis Tool for FPGA-based Accelerators
Information
- Paper:Lin-Analyzer: A High-level Performance Analysis Tool for
FPGA-based Accelerators - Author: Guanwen Zhong
- Key words:DSE,accelerator performance estimation
Work
- Introduce a high-level analysis tool, Lin-Analyzer,to perform fast and accurate FPGA performance estimation as well as DSE according to different optimizations (loop unrolling, pipelining and array partitioning) without generating any RTL implementations.
- Identify bottlenecks of different FPGA implementations when applying diverse optimizations.
The goal of Lin-Analyzer is to perform an early design space exploration and recommend the best suited optimization configuration for an application when mapped to FPGAs.The HLS tool should then be invoked with the suggested configuration to obtain the final synthesized accelerator.
Workflow:
Conclusion&Idea
在早期的工作中,人们通过编译器辅助的静态程序分析方法进行性能评估和DSE,这样做的缺点是受到固有的保守依赖分析影响,可能会导致操作之间的错误依赖,并限制加速器可利用的并行性,在预测性能时有很大的误差:
Lin-Analyzer利用动态分析并使用从程序跟踪生成的动态数据依赖图(DDDGs)来表示要设计的加速器的数据流。DDDG是一种有向无环图,其中节点表示操作,边表示节点之间的数据依赖关系,直接支持C/C++等高级语言。
代码分析、优化和修改是通过LLVM pass在IR上执行的。
此外,Lin-Analyzer只优化性能,并在必要时让加速器使用所有可用的FPGA资源,缺少了trade-off。