f28027
说明
`AD通过通道一采样3.3v电压，触发方式设为ePWM1A触发，采到电压数值应为2的12次方
ePWM的顶端值设为 采样的3倍，则输出波形为 占空比为66.6%
ePWM配置的地方 在PWM子程序中写入
比较值：
// Counter Compare Submodule Registers
(*ePWM[1]).CMPA.half.CMPA =4096; // set duty 0% initially
(*ePWM[1]).CMPB = 0; // set duty 0% initially
(*ePWM[1]).CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Shadow mode
(*ePWM[1]).CMPCTL.bit.LOADAMODE = CC_CTR_PRD;
占空比设置
//配置计数点占空比
// Action Qualifier SubModule Registers
(*ePWM[1]).AQCTLA.bit.ZRO = AQ_CLEAR;//Set: force EPWMxA output high. 0点置零
(*ePWM[1]).AQCTLA.bit.CAU = AQ_SET;//Action when the counter equals 比较点置1
//the active CMPA register,Clear: force EPWMxA output low.
(*ePWM[1]).AQCTLB.bit.ZRO = AQ_NO_ACTION;
(*ePWM[1]).AQCTLB.bit.CAU = AQ_NO_ACTION;
(*ePWM[1]).AQCTLB.bit.PRD = AQ_NO_ACTION;
在主函数中写入
// Configure ePWM
PWM_1ch_CNF(12288);// 顶端值
EPwm1Regs.ETSEL.bit.SOCAEN = 1;//Enable EPWMxSOCA pulse
EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_ZERO; // Use CTR = ZRO events as trigger
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
主函数为
/*
* main.c
*/
#include "PeripheralHeaderIncludes.h"
#include "F2802x_EPWM_defines.h"
#define ADCTRIG_EPWM1_SOCA 5
volatile struct EPWM_REGS EPwm1Regs;
volatile struct EPWM_REGS EPwm2Regs;
volatile struct EPWM_REGS EPwm3Regs;
volatile struct EPWM_REGS EPwm4Regs;
// ADC声明
// Used for ADC Configuration
int ChSel[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
int TrigSel[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
int ACQPS[16] = {8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8};
void ADC_SOC_CNF(int ChSel[], int Trigsel[], int ACQPS[], int IntChSel, int mode);
//pwm声明
void PWM_1ch_CNF(int16 period);
// Used to indirectly access all EPWM modules
volatile struct EPWM_REGS *ePWM[] =
{ &EPwm1Regs, //intentional: (ePWM[0] not used)
&EPwm1Regs,
&EPwm2Regs,
&EPwm3Regs,
&EPwm4Regs,
#if (!DSP2802x_DEVICE_H)
&EPwm5Regs,
&EPwm6Regs,
#if (DSP2803x_DEVICE_H || DSP2804x_DEVICE_H)
&EPwm7Regs,
#if (DSP2804x_DEVICE_H)
&EPwm8Regs
#endif
#endif
#endif
};
int main(void) {
// Configure ADC
ChSel[0] = 6;
TrigSel[0] = ADCTRIG_EPWM1_SOCA;
ACQPS [0]= 6;
ADC_SOC_CNF(ChSel,TrigSel,ACQPS, 16, 0); // Mode= Start/Stop (0)
// Configure SOC event generation at PWM level
// Configure ePWM
PWM_1ch_CNF(12288);// 顶端值
EPwm1Regs.ETSEL.bit.SOCAEN = 1;//Enable EPWMxSOCA pulse
EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_ZERO; // Use CTR = ZRO events as trigger
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
return 0;
}
ADC的配置函数
//----------------------------------------------------------------------------------
// FILE: ADC_SOC_CNF.c.c
//
// Description: ADC configuration to support up to 16 conversions on
// Start of Conversion(SOC) based ADCs (type 3) found on F2802x and
// F3803x devices. Independent selection of Channel, Trigger and
// acquisition window using ChSel[],TrigSel[] and ACQPS[].
//
// Dependencies: Assumes the {DeviceName}-usDelay.asm is inlcuded in the project
// Version: 3.0
//
// Target: TMS320F2802x(PiccoloA),
// TMS320F2803x(PiccoloB),
//
// The function call is:
//
// void ADC_SOC_CNF(int ChSel[], int Trigsel[], int ACQPS[], int IntChSel, int mode)
//
// Function arguments defined as:
//-------------------------------
// ChSel[] = Channel selection made via a channel # array passed as an argument
// TrigSel[]= Source for triggering conversion of a channel,
// selection made via a trigger # array passed as argument
// ACQPS[] = AcqWidth is the S/H aperture in #ADCCLKS,# array passed as argument
// IntChSel = Channel number that would trigger an ADC Interrupt 1 on completion(EOC)
// if no channel triggers ADC interrupt pass value > 15
// Mode = Operating mode: 0 = Start / Stop mode, needs trigger event
// 1 = Continuous mode, no trigger needed
// 2 = CLA Mode, start stop mode with auto clr INT Flag
//================================================================================
#include "PeripheralHeaderIncludes.h"
#include "F2802x_Adc.h"
volatile struct ADC_REGS AdcRegs;
void ADC_SOC_CNF(int ChSel[], int Trigsel[], int ACQPS[], int IntChSel, int mode)
{
extern void DSP28x_usDelay(Uint32 Count);
EALLOW;
AdcRegs.ADCCTL1.bit.ADCREFSEL = 0; //内部/外部参考选择, 0:内部能带隙用于参考源的产生
AdcRegs.ADCCTL1.bit.ADCBGPWD = 1; // Power up band gap 内核内的能带隙缓冲电路上电
AdcRegs.ADCCTL1.bit.ADCREFPWD = 1; // Power up reference 内核内的参考缓冲电路断电
AdcRegs.ADCCTL1.bit.ADCPWDN = 1; // Power up rest of ADC
AdcRegs.ADCCTL1.bit.ADCENABLE = 1; // Enable ADC
DSP28x_usDelay(1000); // Delay before converting ADC channels
AdcRegs.ADCCTL1.bit.INTPULSEPOS = 1; //中断脉冲在ADC结果锁存到结果寄存器的前一个周期产生
AdcRegs.ADCSOC0CTL.bit.ACQPS = ACQPS[0]; //控制SOCx的采样和保持窗口。最小允许值为6。 ,, 8,,采样窗口为9个周期的长度
AdcRegs.ADCSOC1CTL.bit.ACQPS = ACQPS[1];
AdcRegs.ADCSOC2CTL.bit.ACQPS = ACQPS[2];
AdcRegs.ADCSOC3CTL.bit.ACQPS = ACQPS[3];
AdcRegs.ADCSOC4CTL.bit.ACQPS = ACQPS[4];
AdcRegs.ADCSOC5CTL.bit.ACQPS = ACQPS[5];
AdcRegs.ADCSOC6CTL.bit.ACQPS = ACQPS[6];
AdcRegs.ADCSOC7CTL.bit.ACQPS = ACQPS[7];
AdcRegs.ADCSOC8CTL.bit.ACQPS = ACQPS[8];
AdcRegs.ADCSOC9CTL.bit.ACQPS = ACQPS[9];
AdcRegs.ADCSOC10CTL.bit.ACQPS = ACQPS[10];
AdcRegs.ADCSOC11CTL.bit.ACQPS = ACQPS[11];
AdcRegs.ADCSOC12CTL.bit.ACQPS = ACQPS[12];
AdcRegs.ADCSOC13CTL.bit.ACQPS = ACQPS[13];
AdcRegs.ADCSOC14CTL.bit.ACQPS = ACQPS[14];
AdcRegs.ADCSOC15CTL.bit.ACQPS = ACQPS[15];
AdcRegs.INTSEL1N2.bit.INT1SEL = IntChSel; // IntChSel=16, IntChSel causes ADCInterrupt 1 ,ADCINTx EOC源选择 ,16,无效值
// INTSEL1N2,,中断选择1和2寄存器（INTSEL1N2）（地址偏移量08h）
if (mode == 0) // Start-Stop conv mode 模式选择，
{
AdcRegs.ADCINTFLG.bit.ADCINT1 = 0; // clear interrupt flag for ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT = 0; // clear ADCINT1 flag to begin a new set of conversions
//0:在ADCINTx标志（ADCINTFLG寄存器）被用户清除前，没有另外的 ADCINTx边沿产生。
AdcRegs.ADCINTSOCSEL1.all=0x0000; // No ADCInterrupt will trigger SOCx,,没有ADCINT能触发SOCx。TRIGSEL字段决定了SOCx的触发源
AdcRegs.ADCINTSOCSEL2.all=0x0000;
}
if (mode == 1) // Continuous conv mode
{
AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // set ADCInterrupt 1 to auto clr 1:无论EOC边沿何时产生都将产生ADCINTx边沿（不考虑标志位是否清零）
AdcRegs.ADCINTSOCSEL1.all=0xFF;// ADCInterrupt 1 will trigger SOCx, TrigSel is ignored
AdcRegs.ADCINTSOCSEL2.all=0xFF;
}
if (mode == 2) // CLA mode, Start Stop ADC with auto clr ADC Flag
{
AdcRegs.ADCINTFLG.bit.ADCINT1 = 0; // clear interrupt flag for ADCINT1
AdcRegs.INTSEL1N2.bit.INT1CONT = 1; // set ADCInterrupt 1 to auto clr
AdcRegs.ADCINTSOCSEL1.all=0x0000; // No ADCInterrupt will trigger SOCx
AdcRegs.ADCINTSOCSEL2.all=0x0000;
}
if(IntChSel<15)
AdcRegs.INTSEL1N2.bit.INT1E = 1; // enable ADC interrupt 1
else
AdcRegs.INTSEL1N2.bit.INT1E = 0; // disable the ADC interrupt 1
// Select the channel to be converted when SOCx is received
AdcRegs.ADCSOC0CTL.bit.CHSEL= ChSel[0]; //选择被转换的通道。
AdcRegs.ADCSOC1CTL.bit.CHSEL= ChSel[1];
AdcRegs.ADCSOC2CTL.bit.CHSEL= ChSel[2];
AdcRegs.ADCSOC3CTL.bit.CHSEL= ChSel[3];
AdcRegs.ADCSOC4CTL.bit.CHSEL= ChSel[4];
AdcRegs.ADCSOC5CTL.bit.CHSEL= ChSel[5];
AdcRegs.ADCSOC6CTL.bit.CHSEL= ChSel[6];
AdcRegs.ADCSOC7CTL.bit.CHSEL= ChSel[7];
AdcRegs.ADCSOC8CTL.bit.CHSEL= ChSel[8];
AdcRegs.ADCSOC9CTL.bit.CHSEL= ChSel[9];
AdcRegs.ADCSOC10CTL.bit.CHSEL= ChSel[10];
AdcRegs.ADCSOC11CTL.bit.CHSEL= ChSel[11];
AdcRegs.ADCSOC12CTL.bit.CHSEL= ChSel[12];
AdcRegs.ADCSOC13CTL.bit.CHSEL= ChSel[13];
AdcRegs.ADCSOC14CTL.bit.CHSEL= ChSel[14];
AdcRegs.ADCSOC15CTL.bit.CHSEL= ChSel[15];
AdcRegs.ADCSOC0CTL.bit.TRIGSEL= Trigsel[0]; //SOCx触发源选择 ,sampling triggered by EPWM1 SOCA
AdcRegs.ADCSOC1CTL.bit.TRIGSEL= Trigsel[1];
AdcRegs.ADCSOC2CTL.bit.TRIGSEL= Trigsel[2];
AdcRegs.ADCSOC3CTL.bit.TRIGSEL= Trigsel[3];
AdcRegs.ADCSOC4CTL.bit.TRIGSEL= Trigsel[4];
AdcRegs.ADCSOC5CTL.bit.TRIGSEL= Trigsel[5];
AdcRegs.ADCSOC6CTL.bit.TRIGSEL= Trigsel[6];
AdcRegs.ADCSOC7CTL.bit.TRIGSEL= Trigsel[7];
AdcRegs.ADCSOC8CTL.bit.TRIGSEL= Trigsel[8];
AdcRegs.ADCSOC9CTL.bit.TRIGSEL= Trigsel[9];
AdcRegs.ADCSOC10CTL.bit.TRIGSEL= Trigsel[10];
AdcRegs.ADCSOC11CTL.bit.TRIGSEL= Trigsel[11];
AdcRegs.ADCSOC12CTL.bit.TRIGSEL= Trigsel[12];
AdcRegs.ADCSOC13CTL.bit.TRIGSEL= Trigsel[13];
AdcRegs.ADCSOC14CTL.bit.TRIGSEL= Trigsel[14];
AdcRegs.ADCSOC15CTL.bit.TRIGSEL= Trigsel[15];
EDIS;
AdcRegs.ADCSOCFRC1.all = 0xFFFF; // kick-start ADC 1:清除SOCx溢出标志
}
ePWM的配置
#include "PeripheralHeaderIncludes.h"
#include "F2802x_EPWM_defines.h"
extern volatile struct EPWM_REGS *ePWM[];
void PWM_1ch_CNF(int16 period)
{
// Time Base SubModule Registers
(*ePWM[1]).TBCTL.bit.PRDLD = TB_IMMEDIATE; // set Immediate load
//Load the TBPRD register immediately
//without using a shadow register
(*ePWM[1]).TBPRD = period-1; // PWM frequency = 1 / period
(*ePWM[1]).TBPHS.half.TBPHS = 0; //Set Phase register to zero
(*ePWM[1]).TBCTR = 0; // clear TB counter
(*ePWM[1]).TBCTL.bit.CTRMODE = TB_COUNT_UP; //Up-count mode
(*ePWM[1]).TBCTL.bit.HSPCLKDIV = TB_DIV1; //TBCLK = SYSCLKOUT / (HSPCLKDIV × CLKDIV)
(*ePWM[1]).TBCTL.bit.CLKDIV = TB_DIV1; //TBCLK = SYSCLKOUT / (HSPCLKDIV × CLKDIV)
//通过上面设置后TBCLK = SYSCLKOUT
(*ePWM[1]).TBCTL.bit.PHSEN = TB_DISABLE; // Do not load the time-base counter (TBCTR) from
// the time-base phase register (TBPHS)
(*ePWM[1]).TBCTL.bit.SYNCOSEL = TB_CTR_ZERO; // CTR = zero: Time-base counter
// equal to zero (TBCTR = 0x0000)
// Counter Compare Submodule Registers
(*ePWM[1]).CMPA.half.CMPA =4096; // set duty 0% initially
(*ePWM[1]).CMPB = 0; // set duty 0% initially
(*ePWM[1]).CMPCTL.bit.SHDWAMODE = CC_SHADOW; //Shadow mode
(*ePWM[1]).CMPCTL.bit.LOADAMODE = CC_CTR_PRD;
//配置计数点占空比
// Action Qualifier SubModule Registers
(*ePWM[1]).AQCTLA.bit.ZRO = AQ_CLEAR;//Set: force EPWMxA output high. 0点
(*ePWM[1]).AQCTLA.bit.CAU = AQ_SET;//Action when the counter equals 比较点
//the active CMPA register,Clear: force EPWMxA output low.
(*ePWM[1]).AQCTLB.bit.ZRO = AQ_NO_ACTION;
(*ePWM[1]).AQCTLB.bit.CAU = AQ_NO_ACTION;
(*ePWM[1]).AQCTLB.bit.PRD = AQ_NO_ACTION;
}
示波器波形如图
出的问题
1.头文件 按照出的错误一个个找到添加
2.移植函数的时候只yi要用的就行
3.28027
否则就会出现
C28xx: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging
6109
被折叠的 条评论
为什么被折叠?
到【灌水乐园】发言
