0.96寸OLED显示屏模块

本文详细介绍了0.96寸OLED显示屏的构成,特别是SSD1306驱动芯片的工作原理,包括其接口、内存、供电、通信方式(如4线SPI和I2C)以及命令表。还涵盖了初始化过程和如何通过通信协议控制屏幕显示。

摘要生成于 C知道 ,由 DeepSeek-R1 满血版支持, 前往体验 >

一、OLED模块简介

名称:0.96OLED显示屏

组成:一块PCB板(OLED的外围电路)、屏幕、驱动芯片(内嵌在屏幕下方)

驱动芯片:SSD1306(本篇是基于此芯片) / SSD1315(兼容)

像素:128*64像素

二、SSD1306驱动芯片

2.1 SSD1306简介

        SSD1306是一款OLED/PLED点阵显示屏的控制器,可以嵌入在屏幕中,用于执行接收数据、显示存储、扫描刷新等任务

        驱动接口:128个SEG引脚和64COM引脚,对应128*64像素点阵显示屏

        内置显示存储器(GDDRAM):128*64 bit 128*8 ByteSRAM(1bit位对应一个像素点)

        供电:VDD=1.65~3.3V(IC 逻辑,芯片内部的逻辑电路、存储器)、VCC=7~15V(面板驱动,点亮每个像素点)对于VCC而言,屏幕厂商已经在屏幕内部集成了一个升压电路,使用只需要开启即可

        通信接口:8位6800/8080并行接口(SSD1315不支持)、3/4线SPI接口、I2C接口

        通过通信引脚,把想要显示的内容数据发送给驱动芯片,当驱动芯片收到数据后,把数据存至SRAM显示存储器,通过时钟和扫描电路,将显示存储器的数据自动对应刷新到屏幕

        因此,只需要通过通信协议,将待显示的内容数据存储至驱动芯片SRAM显示存储器中即可,屏幕显示由硬件自动完成

2.2 SSD1306框图及引脚定义

BS0~BS2选择通信接口:

其他引脚在不同通信协议下的意义:

2.3 4针脚I2C接口模块原理图

2.4 通信时序

2.4.1 4线SPI的传输时序

        串行传输只允许写,不允许读。因此,只有两个功能:写命令、写数据

        E和R/W#时钟没用到,接低电平,CS#片选接低电平,表示始终选中此芯片

        D/C#:高电平:数据,低电平:命令

2.4.2 3线SPI的传输时序

2.4.3 I2C的通信时序

        Co(连续模式位):Co = 1,每发送一个字节数据前都加一个Control byte(命令和数据可以灵活切换)

        Co = 0,在字节数据前只发送一个Control byte,之后全部都是字节数据

2.5 执行逻辑框图

        左上角:128*64bit像素的点阵显示屏,以左上角为原点,向右为x正轴(0~127),向下为y正轴(0~63)

        左下角:128*8Byte的GDDRAM,x轴与点阵显示屏一样,y轴有所不同,8位一组分为一页,范围为PAGE0 ~ PAGE7,共8页。每传输一个字节数据,将其展开,纵向排列(LSB在上,MSB在下),一位控制一个像素点

        每写完一个字节数据后,内部的地址指针自动向右移动一个单位当写到页的最后一字节时,地址指针默认回到页的起始位置,也可以通过配置寻址模式实现自动换页,换到下一页的开头

        如果想要实现Y坐标的任意指定,需要读取GGDRAM,但串行传输只允许写数据,那需要在程序中定义缓存数组来实现:先读写缓存数组,最后一起更新到屏幕的GDDRAM中

2.6 命令表

        通过写命令时序传输的字节,作为发送给SSD1306的一个命令

        SSD1306查询命令表的定义,执行相应的操作,命令可以由一个字节或者连续的多个字节组成

        命令可分为基础命令、滚屏命令、寻址命令、硬件配置命令、时间及驱动命令5大类

2.6.1 基本命令表

2.6.2 滚动命令表

2.6.3 寻址设置命令表

2.6.4 硬件配置命令表

2.6.5 时间及驱动命令

2.7 初始化过程(内部提供VCC)

Pin Number Symbol I/O Function P Po o we er r S Su up pp pl ly y 9 VDD P P Po o we er r S Su up pp pl ly y f fo or r L Lo og gi ic c This is a voltage supply pin. It must be connected to external source. 8 VSS P G Gr ro ou un nd d o of f L Lo og gi ic c C Ci ir rc cu ui it t This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground. 28 VCC P P Po o we er r S Su up pp pl ly y f fo or r OE EL L P Pa an ne el l This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and V SS when the converter is used. It must be connected to external source when the converter is not used. 29 VLSS P G Gr ro ou un nd d o of f A An na al lo og g C Ci ir rc cu ui it t This is an analog ground pin. It should be connected to V SS externally. D Dr ri iv ve er r 26 IREF I C Cu ur rr re en nt t R Re ef fe er re en nc ce e f fo or r B Br ri ig gh ht tn ne es ss s A Ad dj ju us st t me en nt t This pin is segment current reference pin. A resistor should be connected between this pin and V SS . Set the current at 12.5μA maximum. 27 VCOMH O V Vo ol lt ta ag ge e Ou ut tp pu ut t Hi ig gh h L Le ev ve el l f fo or r C C O M S Si ig gn na al l This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and V SS . D DC C/ /D DC C C Co on nv ve er rt te er r 6 VDDB P P Po o we er r S Su up pp pl ly y f fo or r DC C/ / DC C C Co on nv ve er rt te er r C Ci ir rc cu ui it t This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to V DD when the converter is not used. 4 / 5 2 / 3 C1P / C1N C2P / C2N I P Po os si it ti iv ve e T Te er r mi in na al l o of f t th he e F Fl ly yi in ng g I In nv ve er rt ti in ng g C Ca ap pa ac ci it to or r Ne eg ga at ti iv ve e T Te er r mi in na al l o of f t th he e F Fl ly yi in ng g B Bo oo os st t C Ca ap pa ac ci it to or r The charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. I In nt te er rf fa ac ce e 10 11 12 BS0 BS1 BS2 I C Co o m mu un ni ic ca at ti in ng g P Pr ro ot to oc co ol l S Se el le ec ct t These pins are MCU interface selection input. See the following table: BS0 BS1 BS2 I 2 C 0 1 0 3-wire SPI 1 0 0 4-wire SPI 0 0 0 8-bit 68XX Parallel 0 0 1 8-bit 80XX Parallel 0 1 1 14 RES# I P Po o we er r R Re es se et t f fo or r C Co on nt tr ro ol ll le er r a an nd d Dr ri iv ve er r This pin is reset signal input. When the pin is low, initialization of the chip is executed. Keep this pin pull high during normal operation. 13 CS# I C Ch hi ip p S Se el le ec ct t This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. 15 D/C# I Da at ta a/ /C Co o m ma an nd d C Co on nt tr ro ol l This pin is Data/Command control pin. When the pin is pulled high, the input at D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0 will be transferred to the command register. When the pin is pulled high and serial interface mode is selected, the data at SDIN will be interpreted as data. When it is pulled low, the data at SDIN will be transferred to the command register. In I 2 C mode, this pin acts as SA0 for slave address selection. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams. 17 E/RD# I R Re ea ad d/ / Wr ri it te e E En na ab bl le e o or r R Re ea ad d This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial or I 2 C mode is selected, this pin must be connected to V SS . GoldenMorning Electronic 4 1.5 Pin Definition (Continued) Pin Number Symbol I/O Function I In nt te er rf fa ac ce e ( (C Co on nt ti in nu ue ed d) ) 16 R/W# I R Re ea ad d/ / Wr ri it te e S Se el le ec ct t o or r Wr ri it te e This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial or I 2 C mode is selected, this pin must be connected to V SS . 18~25 D0~D7 I/O Ho os st t Da at ta a I In np pu ut t/ / Ou ut tp pu ut t B Bu us s These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. When I 2 C mode is selected, D2 & D1 should be tired together and serve as SDA out & SDA in in application and D0 is the serial clock input SCL. Unused pins must be connected to V SS except for D2 in serial mode. R Re es se er rv ve e 7 N.C. - R Re es se er rv ve ed d P Pi in n The N.C. pin between function pins are reserved for compatible and flexible design. 1, 30 N.C. (GND) - R Re es se er rv ve ed d P Pi in n ( (S Su up pp po or rt ti in ng g P Pi in n) ) The supporting pins can reduce the influences from stresses on the function pins. These pins must be connected to external ground as the ESD protection circuit.
评论
添加红包

请填写红包祝福语或标题

红包个数最小为10个

红包金额最低5元

当前余额3.43前往充值 >
需支付:10.00
成就一亿技术人!
领取后你会自动成为博主和红包主的粉丝 规则
hope_wisdom
发出的红包
实付
使用余额支付
点击重新获取
扫码支付
钱包余额 0

抵扣说明:

1.余额是钱包充值的虚拟货币,按照1:1的比例进行支付金额的抵扣。
2.余额无法直接购买下载,可以购买VIP、付费专栏及课程。

余额充值