What is digital verification in VLSI?

Emerging in the 1970s, Very-Large-Scale Integration (VLSI) represents a method in which thousands of transistors are combined to create a single Integrated Circuit (IC). Prior to the advent of VLSI, the functionality of most ICs was somewhat restricted. A typical electronic circuit could include a CPU, ROM, RAM, and other supplementary logic. However, VLSI has empowered IC designers to incorporate all these elements onto a single chip. As advancements in manufacturing technology are made annually, it has become possible to integrate hundreds of millions, or even billions, of transistors onto a single chip. While efforts have been made to rename VLSI as ULSI (Ultra Large-Scale Integration) for the sake of precision, the term 'VLSI' remains in widespread use. From its inception, this technology has significantly enriched our daily lives. The advent of VLSI designs has seen the applications of Integrated Circuits (ICs) dramatically increase in fields such as high-performance computing, control systems, telecommunications, image and video processing, and consumer electronics. This surge shows no sign of slowing.

Cutting-edge technologies of today, including high-resolution, low bit-rate video, and cellular communications, provide end-users with a multitude of applications, impressive processing power, and unprecedented portability. This trajectory is anticipated to continue its rapid pace, carrying profound implications for VLSI and system design.

What is digital verification in VLSI?

In VLSI, Design Verification constitutes the most critical stage in the product development lifecycle. Its main objective is to ensure that the design of the product or system is in full compliance with the system's standards and requirements. Nearly 70% of the total time allocated for the product development process is spent on design verification and testing. This makes it a primary focus for many foundries. Verification is a mandatory process at each step of VLSI design, with any errors encountered necessitating a return to the initial stages for correction.

How is the verification process conducted in VLSI?

The verification process in VLSI unfolds in two distinct stages:

Verification: This phase employs predictive analysis to affirm that the synthesized design will function as specified when constructed. This stage of the Chip Development Life Cycle checks if the design aligns with the intended design specifications. It begins once the design architecture/micro architecture is outlined. The purpose of verification is to ensure the design functions correctly before the chip fabrication. Simulations using RTL and netlists are conducted for functionality assurance. Debugging at this stage is relatively simple, and any detected bugs can be fixed in the RTL. This is critical because any functionality errors post chip taping could be disastrous and highly costly. The verification step is deemed an essential part of the design life cycle since any critical bugs undiscovered before fabrication could lead to reprocessing, thereby increasing the overall cost of the design process. Verification precedes manufacturing and checks the design's correctness rather than the actual hardware. For this purpose, S2C provides comprehensive digital verification solutions, especially the LX2 (Estimated ASIC Gates up to 392M)，designed for large-scale design verification.