Evolution of FPGA Prototyping in EDA

Categories: EDA, Emulation, FPGA, Prototyping, S2C EDA

As AI and 5G technologies burgeon, the rise of interconnected devices is reshaping everyday life and driving innovation across industries. This rapid evolution accelerates the transformation of the chip industry, placing higher demands on SoC design. Moore's Law indicates that while chip sizes shrink, the number of transistors increases rapidly. It is hard to imagine achieving such highly integrated, large-scale designs without advanced EDA tools.

Tape-out is a critical and high-risk phase in chip design. Even a minor error can lead to significant financial losses and missed market opportunities. Logic or functional errors account for nearly 50% of tape-out failures, with design errors comprising 50%-70% of these functional defects. Therefore, verification of SoC design is crucial to successful tape-out. SoC verification is highly complex, taking up about 70% of the entire cycle. To accelerate time-to-market, system software development and pre-tape-out verification must be conducted concurrently, highlighting the significant advantages of prototyping.

For large-scale SoC designs, traditional software simulations often fall short due to the slow execution speed. Consequently, prototyping and hardware simulations have emerged as the primary verification methods, with high-performance prototyping taking the lead. Prototyping, particularly FPGA-based, can be thousands to millions of times faster than software simulations. It is more cost-effective and faster than hardware simulations, making it indispensable for verifying complex SoCs. However, manually built prototyping platforms are difficult to maintain and scale in multi-FPGA and complex design environments. This method is time-consuming and prone to errors, leading to increased risks of project delays and cost overruns. Commercial prototyping solutions have thus emerged to address these challenges.

S2C plays a pivotal role in the RISC-V ecosystem as a member of RISC-V International. Let's explore how S2C aids chip designers in optimizing and differentiating their RISC-V processor-based SoCs across diverse applications.

S2C has been successfully delivering rapid SoC prototyping solutions since 2003 with over 600 customers, including 6 of the world's top 10 semiconductor companies. I personally have been involved with the prototyping market for a good part of my career and know S2C intimately.

The Birth of Commercial Prototyping

In 1992, Aptix, the pioneer in the prototyping area, launched the System Explorer system, utilizing FPGAs and custom interconnect chips to achieve commercial prototyping. In subsequent years, projects such as Transmogrifier-l from the University of Toronto, AnyBoard from North Carolina State University, Protozone from Stanford University, and BORG from the University of California, Santa Cruz, explored ways to implement HDL chip designs on prototyping boards. Although these projects were not ready for large-scale commercialization, Aptix’s success inspired other vendors to spark interest in this field. Despite later being absorbed in mergers, Aptix's pioneering contributions to chip verification methodology remain historically significant.

In 2003, Toshio Nakama founded S2C in San Jose, California, after departing from Aptix. At DAC 2005, S2C unveiled its first prototyping product, the IP Porter, and soon launched the commercially successful Prodigy series. This marked a new era for the company, positioning S2C as a leader in rapid SoC prototyping solutions. Concurrently, the Dini Group in the US released its first commercial FPGA prototyping system, the DN250k10, based on six Xilinx XC4085 FPGAs, providing a flexible and cost-effective solution for design teams. Around the same period, Sweden's HARDI Electronics AB launched its first FPGA-based prototyping system, HAPS, using Xilinx Virtex FPGAs.

Rapid Growth Driven by Competition

In 2008, Synopsys entered the prototyping market by acquiring Synplicity for $227 million, marking the start of a rapidly growing and competitive era for prototyping. Synopsys spent nearly four years integrating the technology, eventually releasing the HAPS-70 series, a fully automated prototyping product. This acquisition significantly grew the prototyping market, previously dominated by software and hardware simulation tools.

Cadence soon followed suit. Historically focused on designing its FPGA boards, Cadence faced challenges until it acquired Taray in March 2010. Taray’s pioneering routing-aware pin assignment technology optimized FPGA design with the circuit board, aiding in the development of a robust prototyping platform. Cadence later collaborated with the Dini Group to develop the Protium prototyping product. However, Dini Group was acquired by Synopsys on December 5th, 2019. Today, Cadence focuses on streamlining the integration between its prototyping and hardware simulation products, ensuring seamless connectivity.

Siemens EDA (formerly Mentor Graphics acquired in 2016), had a turbulent history in prototyping. In the late 1990s, Siemens EDA licensed emulation technology from Aptix but faced several challenges. To enhance its timing-driven and multi-FPGA partitioning capabilities, Siemens EDA acquired Auspy and Flexras Technologies, the latter known for its “Wasga” automatic partitioning software. In June 2021, Siemens EDA further strengthened its prototyping portfolio by acquiring PRO DESIGN’s proFPGA product series.

The entry of these major companies, along with providers like S2C, facilitated the shift from software and hardware simulation to automated prototyping solutions, enhancing the efficiency and accuracy of SoC designs, and paving the way for further innovations in the entire EDA industry.

Major Challenges and Solutions in Prototyping

The emergence of innovative prototyping solutions has driven increased complexity in SoC design and heightened demands for rigorous prototyping. These solutions require specialized expertise to manage design partitioning, mapping, interface and communications with external environments, debugging, and performance optimization. Consequently, prototyping has become a high-barrier field with only a few EDA companies maintaining a leading position. Some companies even rely on continuous mergers to strengthen their market presence.

As a leader in prototyping, S2C addresses challenges in multi-FPGA RTL logic partitioning, interconnect topology, IO allocation, and high-speed interfaces by timing-driven RTL partitioning algorithms and built-in incremental compilation algorithms. S2C continually updates hardware configurations to support more FPGAs and offer higher-performance connectors ensuring its technology remains at the industry's forefront.

With over 20+ years of industry experience and a relentless commitment to innovation, S2C equips clients with the highly trusted tools necessary to stay ahead in the competitive market. Their comprehensive solutions accelerate time-to-market, offering unparalleled speed, accuracy, and reliability.