fx2lp_loopback_proj:
(1) fx2lp_slaveFIFO2b_loopback_fpga_top.v
module fx2lp_slaveFIFO2b_loopback_fpga_top(
// reset_n_in,
fdata,
faddr,
slrd,
slwr,
sloe,
flagd,
flaga,
done,
clk,
clk_out
);
//input reset_n_in;
inout [15:0]fdata;
input flaga;
input flagd;
input clk;
output clk_out;
output [1:0]faddr;
output sloe;
output slwr;
output slrd;
output done;
reg slrd_n;
reg slwr_n;
reg sloe_n;
reg [15:0] fifo_data_in;
wire [15:0] fifo_data_out;
reg [15:0] data_out;
reg done_d;
reg [3:0]wait_s;
wire clk_out_0;
wire clk_out_90;
wire clk_out_180;
wire clk_out_270;
reg [1:0]faddr_n;
parameter [1:0] loop_back_idle =