Intel-x86-System-Programming-Guide, Part 1,Chapter 3.1 MEMORY MANAGEMENT OVERVIEW

声明：原文版权归属Intel®，这里仅作学习使用

来源：Intel® 64 and IA-32 Architectures Software Developer's Manual Volume 3A: System Programming Guide, Part 1

 

---

 

CHAPTER 3 PROTECTED-MODE MEMORY MANAGEMENT 保护模式内存管理

 

This chapter describes the Intel 64 and IA-32 architecture’s protected-mode memory management facilities, including the physical memory requirements, segmentation mechanism, and paging mechanism.

See also: Chapter 4, “Protection” (for a description of the processor’s protection mechanism) and Chapter 15, “8086 Emulation” (for a description of memory addressing protection in real-address and virtual-8086 modes).

 

3.1 MEMORY MANAGEMENT OVERVIEW 内存管理概述

The memory management facilities of the IA-32 architecture are divided into two parts: segmentation and paging（内存管理设备分为两部分：分段和分页）. Segmentation provides a mechanism of isolating individual code, data, and stack modules so that multiple programs (or tasks) can run on the same processor without interfering with one another. Paging provides a mechanism for implementing a conventional demand-paged, virtual-memory system where sections of a program’s execution environment are mapped into physical memory as needed. Paging can also be used to provide isolation between multiple tasks. When operating in protected mode, some form of segmentation must be used. There is no mode bit to disable segmentation. The use of paging, however, is optional.（分段是必须的，分页是可选的）

These two mechanisms (segmentation and paging) can be configured to support simple single-program (or single-task) systems, multitasking systems, or multiple-processor systems that used shared memory.

As shown in Figure 3-1, segmentation provides a mechanism for dividing the processor’s addressable memory space (called the linear address space)（可寻址的内存空间，叫做线性地址空间） into smaller protected address spaces called segments（较小的受保护的地址空间，叫做段）. Segments can be used to hold the code, data, and stack for a program or to hold system data structures (such as a TSS or LDT)（段可以存放程序的代码、数据、堆栈，或者存放系统的数据结构如TSS或LDT）. If more than one program (or task) is running on a processor, each program can be assigned its own set of segments. The processor then enforces the boundaries between these segments and insures that one program does not interfere with the execution of another program by writing into the other program’s segments. The segmentation mechanism also allows typing of segments so that the operations that may be performed on a particular type of segment can be restricted.

All the segments in a system are contained in the processor’s linear address space. To locate a byte in a particular segment, a logical address (also called a far pointer)（用逻辑地址（远指针）寻找特定段中的字节） must be provided. A logical address consists of a segment selector and an offset（逻辑地址包括段选择符和偏移量）. The segment selector is a unique identifier for a segment（段选择符是段的唯一的标识）. Among other things it provides an offset into a descriptor table (such as the global descriptor table, GDT) to a data structure called a segment descriptor（段选择符提供了在描述符表的偏移量，（这里的描述符表如GDT），指向了一个叫做段描述符的数据结构）. Each segment has a segment descriptor, which specifies the size of the segment, the access rights and privilege level for the segment, the segment type, and the location of the first byte of the segment in the linear address space (called the base address of the segment)（每个段都有段描述符，指明了段的大小、访问权限、段的权限、类型和段中首字节在线性地址空间的位置（叫做段的基址））. The offset part of the logical address is added to the base address for the segment to locate a byte within the segment. The base address plus the offset thus forms a linear address in the processor's linear address space.（偏移量加上基地址就形成了处理器的线性地址空间中的线性地址）

 

 

If paging is not used, the linear address space of the processor is mapped directly into the physical address space of processor. （如果没有启用分页，线性地址空间就直接映射到了物理地址空间）The physical address space is defined as the range of addresses that the processor can generate on its address bus.（物理地址空间定义为处理器在其地址总线上可以找到的地址范围）

Because multitasking computing systems commonly define a linear address space much larger than it is economically feasible to contain all at once in physical memory, some method of “virtualizing” the linear address space is needed. This virtualization of the linear address space is handled through the processor’s paging mechanism（通过处理器的分页机制对线性地址空间进行“虚拟化”）.

Paging supports a “virtual memory” environment where a large linear address space is simulated with a small amount of physical memory (RAM and ROM) and some disk storage. When using paging, each segment is divided into pages (typically 4 KBytes each in size), which are stored either in physical memory or on the disk（使用分页时，每个段分为页，每个页通常是4K字节，页存储在内存或者磁盘上）. The operating system or executive maintains a page directory and a set of page tables to keep track of the pages. When a program (or task) attempts to access an address location in the linear address space, the processor uses the page directory and page tables to translate the linear address into a physical address and then performs the requested operation (read or write) on the memory location.（通过页目录、页表将线性地址转化为实际的物理地址）

If the page being accessed is not currently in physical memory, the processor interrupts execution of the program (by generating a page-fault exception缺页异常). The operating system or executive then reads the page into physical memory from the disk and continues executing the program.（若访问的页当前不在内存中，则处理器抛出缺页异常并中断程序执行，将需要的页从磁盘读到内存中，再继续执行程序）

When paging is implemented properly in the operating-system or executive, the swapping of pages between physical memory and the disk is transparent to the correct execution of a program. Even programs written for 16-bit IA-32 processors can be paged (transparently) when they are run in virtual-8086 mode.（若分页在操作系统中合适地实现，则在物理内存和磁盘间的页交换可以对程序执行来说是“透明的”，即程序不知道发生了页交换）