序列信号发生器-移位寄存器构成

电路工作频率高，缺点：移位寄存器长度取决于序列长度，电路占用面积大

module signal_maker(clk,reset,dout,load,din,d);
	parameter width = 4;
	input clk,reset,load;
	input [width-1:0] din;
	output [width-1:0] dout;
	output d;
	reg [width-1:0] dout;
	
	always @ (posedge clk)begin
		if(reset)
			dout <= 0;
		else if(load)
			dout <= din;
		else
			dout <= {dout[width-2:0],dout[width-1]};
	end
	
	assign d = dout[width-1];

endmodule

`timescale 1ns/1ns

module signal_maker_tb;
	parameter width = 4;
	reg clk,reset,load;
	reg [width-1:0] din;
	wire [width-1:0] dout;
	wire d;

	signal_maker n1 (clk,reset,dout,load,din,d);
	
	initial begin
		clk = 0;
		reset = 0;
		load = 0;
	#10	reset = 1;
	#20	reset = 0;
		load = 1;
		din = 4'b1010;
	#10	load = 0;
	#90	load = 1;
		din = 4'b1101;
	#10	load = 0;
	end
	always	begin
		#10	clk = ~clk;
	end
		//#200 $finish;
endmodule