打几拍,在FPGA中和IC中很常用。算是入门必备。
module hunter(
input a,
input clk,
output reg a_d2
);
reg a_d1;
always@(posedge clk)
{a_d2,a_d1}<={a_d1,a};
endmodule
打几拍,在FPGA中和IC中很常用。算是入门必备。
module hunter(
input a,
input clk,
output reg a_d2
);
reg a_d1;
always@(posedge clk)
{a_d2,a_d1}<={a_d1,a};
endmodule