开源EDA软件及其文档

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已于 2024-05-09 09:13:09 修改

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分类专栏：芯片设计与EDA 文章标签：开源EDA软件

于 2024-04-20 17:35:48 首次发布

本文链接：https://blog.csdn.net/tigerisland45/article/details/138004510

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链接：
集成电路EDA设计精英挑战赛
 EDA²侠客岛

Verific Design Automation 提供SystemVerilog、VHDL、UPF Parser

OSS CAD Suite
GitHub - YosysHQ/oss-cad-suite-build: Multi-platform nightly builds of open source digital design and verification tools

RTL Synthesis
Yosys RTL synthesis with extensive Verilog 2005 support
Amaranth refreshed Python toolbox for building complex digital hardware
Migen Python toolbox for building complex digital hardware
ABC A System for Sequential Synthesis and Verification
GHDL VHDL 2008/93/87 simulator (linux-x64 and darwin-x64 platforms only)

Plugins
GHDL plugin VHDL synthesis based on GHDL (linux-x64 and darwin-x64 platforms only)

Formal Tools
sby (formerly SymbiYosys) a front-end driver program for Yosys-based formal hardware verification flows.
mcy Mutation Cover with Yosys
eqy Equivalence Checking with Yosys
sby-gui GUI for sby (formerly SymbiYosys)
aiger AIGER tools including bounded model checker
avy Interpolating Property Directed Reachability tool
Boolector SMT solver and BTOR model checker
Yices 2 SMT solver
Super prove ABC-based AIGER hardware model checker (linux-x64 platform only)
Pono an SMT-based model checker built on smt-switch
Z3 SMT solver
Bitwuzla SMT solver

PnR (Place and Route)
nextpnr a portable FPGA place and route tool (generic, ice40, ecp5, machxo2, nexus, gowin)
Project IceStorm tools for working with Lattice ICE40 bitstreams
Project Trellis tools for working with Lattice ECP5 bitstreams
Project Oxide tools for working with Lattice Nexus bitstreams
Project Apicula tools for working with Gowin bitstreams

FPGA board programming tools
openFPGALoader universal utility for programming FPGA
dfu-util Device Firmware Upgrade Utilities
ecpprog basic driver for FTDI based JTAG probes, to program ECP5 FPGAs
ecpdap program ECP5 FPGAs and attached SPI flash using CMSIS-DAP probes in JTAG mode
fujprog ULX2S / ULX3S JTAG programmer
openocd Open On-Chip Debugger
icesprog iCESugar FPGA board programmer
iceprogduino Olinuxino based programmer for iCE40HX1K-EVB
TinyFPGA USB Bootloader
TinyFPGA-B TinyFPGA B2 Board programmer
iceFUN iceFUN Programmer

Simulation/Testing
GTK Wave fully featured GTK+ based wave viewer
verilator Verilog/SystemVerilog simulator
iverilog Verilog compilation system
cocotb coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

The EPFL Logic Synthesis Libraries (Showcase)
GitHub - lsils/lstools-showcase: Showcase examples for EPFL logic synthesis libraries

Libraries
alice: C++ command shell library
GitHub | Version 0.3 (July 22, 2018) | Documentation
maintained by Mathias Soeken

bill: C++ reasoning library
GitHub | Version 0.1 (June 2, 2020) | Documentation
maintained by Bruno Schmitt

caterpillar: C++ quantum circuit synthesis library
GitHub | Documentation
maintained by Giulia Meuli

easy: C++ exclusive-or sum-of-product (ESOP) library
GitHub | Documentation
maintained by Heinz Riener

kitty: C++ truth table library
GitHub | Version 0.7 (March 13, 2020) | Documentation
maintained by Mathias Soeken and Siang-Yun (Sonia) Lee

lorina: C++ parsing library
GitHub | Version 0.2 (October 18, 2018) | Documentation
maintained by Heinz Riener

mockturtle: C++ logic network library
GitHub | Version 0.3 (July 12, 2022) | Documentation
maintained by Siang-Yun (Sonia) Lee

percy: C++ exact synthesis library
GitHub Dev | GitHub | Version 0.1.2 (May 12, 2018) | Documentation
maintained by Winston Haaswijk

tweedledum: C++ quantum compilation library
GitHub | Version 1.1.1 (September 8, 2021) | Documentation
maintained by Bruno Schmitt

angel: C++ quantum state preparation library
GitHub | Documentation
maintained by Fereshte Mozafari

Examples
abc: A tiny ABC clone that uses alice for creating the CLI shell
countluts: Count and classify LUT functions in a BENCH file
exactmine: Mine optimum Boolean networks from truth tables

External projects using the EPFL Logic Synthesis Libraries
LSOracle (University of Utah, UT, USA)
fiction (part of the Munich Nanotech Toolkit (MNT), Technical University of Munich, Germany)
ropper (Ruan Formigoni, Federal University of Viçosa, Brazil)
NetlistDB (Michal Orsak, Brno University of Technology, Czech Republic)
PandA (Fabrizio Ferrandi, Politecnico di Milano, Italy)
LiveHD (Jose Renau, University of California, Santa Cruz, CA, USA)
staq (SoftwareQ Inc., ON, Canada)
ALSO (Zhufei Chu, Ningbo University, China)