■ Core: ARM 32-bit Cortex™-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait state execution
from Flash memory, frequency up to 168 MHz,
memory protection unit,210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP
instructions
■ Memories
– Up to 1 Mbyte of Flash memory
– Up to 192+4 Kbytes of SRAM including 64-
Kbyte of CCM (core coupled memory) data
RAM
– Flexible static memory controller(FSMC)
supporting Compact Flash, SRAM,
PSRAM, NOR and NAND memories
SOC端 内存控制器(FSMC)
FSMC接口
2.2.9 Flexible static memory controller (FSMC)
The FSMC is embedded in the STM32F405xx and STM32F407xx family. It has four Chip
Select outputs supporting the following modes: PCCard/Compact Flash, SRAM, PSRAM,
NOR Flash and NAND Flash.
Functionality overview:
● Write FIFO
● Maximum FSMC_CLK frequency for synchronous accesses is 60 MHz.