Using MOSFETs in LoadSwitch Applications

Introduction

        In today’s market, power management is more important than ever. Portable systems strive to extend battery life while meeting an ever increasing demand for higher performance. Load switches provide a simple and inexpensive method for the system to make the appropriate power management decisions based on which peripherals or sub-circuits are currently in use. Load switches are found in notebooks, cell phones, hand held gaming systems and many other portable devices.

        在当今的市场上，电力管理比以往任何时候都更重要。便携式系统努力延长电池寿命，同时满足不断增长的更高性能的需求。负载开关为系统提供了一种简单和廉价的方法，可以根据当前使用的外设或子电路作出适当的电源管理决策。负载开关应用于笔记本电脑、手机、手持式游戏机和许多其他便携式设备中。

        The load switch is controlled by the system, and connects or disconnects a voltage rail to a specific load. By turning unused circuitry off, the system as a whole can run more efficiently. The load switch provides a simple means to power a load when it is in demand and allows the system to maximize performance.

        负载开关由系统控制，连接或断开电源到特定的负载。通过关闭未使用的电路，系统整体可以更有效地运行。负载开关提供了一种简单的方法，在负载有需要时提供电源，并允许系统性能最大化。

Load Switch Basics

        A load switch is comprised of two main elements: the pass transistor and the on/off control block, as shown in Figure 1.

        负载开关由两个主要元件组成：通道晶体管和开关控制块，如图1所示。

     

 

        The pass transistor is most commonly a MOSFET (either N-channel or P-channel) that passes the voltage supply to a specified load when the transistor is on

        通道晶体管通常是MOSFET（N沟道或P沟道），当晶体管接通时将电源传递到指定的负载。

1. channel and P-channel Considerations

        The selection of a P-channel or N-channel load switch depends on the specific needs of the application. The N-channel MOSFET has several advantages over the P-channel MOSFET. For example, the N-channel majority carriers (electrons) have a higher mobility than the P-channel majority carriers (holes). Because of this, the N-channel transistor has lower RDS(on) and gate capacitance for the same die area. Thus, for high current applications the N-channel transistor is preferred.

        p沟道或n沟道负载开关的选择取决于应用的具体需要。n沟道MOSFET比p沟道MOSFET有几个优点。例如，N沟道多数载流子（电子）比沟道多数载流子（空穴）具有更高的迁移率。因此，n沟道晶体管对于相同的模面积具有较低的RDS(on)和栅极电容。因此，对于高电流应用，首选n沟道晶体管。

        When using an N-channel MOSFET in a load switch circuit, the drain is connected directly to the input voltage rail and the source is connected to the load. The output voltage is defined as the voltage across the load, and therefore:

        当在负载开关电路中使用N-沟道MOSFET时，漏极直接连接到输入电压，源极连接到负载。输出电压为负载的电压，因此：

VS = VOUT              (eq. 1)

        In order for the N-channel MOSFET to turn on, the gate-to-source voltage must be greater than the threshold voltage of the device. This means that:

        为了使n通道MOSFET打开，栅到源的电压必须大于器件的阈值电压。这意味着：

VG ≥ VOUT + Vth       (eq. 2)

        In order to meet Equation 2, a second voltage rail is needed to control the gate. Therefore, the input voltage rail can be considered independently of the pass transistor. Because of this, the N-channel load switch can be used for very low input voltage rails or for higher voltage rails, as long as the gate-to-source voltage VGS remains higher than the threshold voltage of the device. The designer must ensure that the device maximum ratings and the safe operating area of the MOSFET are not violated.

        为了满足公式2，需要第二个电压轨来控制栅极。因此，输入电压轨道可以考虑独立于通道晶体管。因此，n-通道负载开关可以用于非常低的输入电压轨或更高的电压轨，只要栅极到源的电压VGS仍然高于器件的阈值电压。设计师必须确保不违反MOSFET的器件最高额定值和安全区域。

        When using a P-channel MOSFET in a load switch circuit (as in Figure 1, the source is directly connected to the input voltage rail and the drain is connected to the load. In order for the P-channel load switch to turn on, the source-to-gate voltage must be greater than the threshold voltage. Therefore:

        当在负载开关电路中使用P-通道MOSFET时(如图1所示，源极直接连接到输入电压导轨，漏极连接到负载。为了使P通道负载开关打开，源到栅极的电压必须大于阈值电压。因此：

VIN ≥ VG + Vth       (eq. 3)

        At minimum, the input voltage rail must be greater than the threshold voltage of the selected pass transistor (assuming the gate voltage is 0 V when the load switch is turned on).

        输入电压轨道至少必须大于所选通过晶体管的阈值电压（假设负载开关打开时栅极电压为0V）。

        The P-channel MOSFET has a distinct advantage over the N-channel MOSFET, and that is in the simplicity of the on/off control block. The N-channel load switch requires an additional voltage rail for the gate; the P-channel load switch does not. As with the N-channel MOSFET, the designer must ensure that the device maximum ratings and the safe operating area of the P-channel MOSFET are not violated.

        p通道MOSFET比n通道MOSFET有明显的优势，这就是开/关控制块的简单性。N通道负载开关需要栅极提供额外的电压轨，P通道负载开关不需要。与n通道MOSFET一样，设计人员必须确保不违反p通道MOSFET的器件最大额定值和安全操作区域。

Load Switch Control Circuit Considerations

        There are multiple ways to implement the on/off control block in a load switch circuit. This section will cover one control circuit example for the N-channel and one for the P-channel load switch.

        在负载开关电路中实现开关控制块。本节将介绍n通道的控制电路示例和P通道负载开关的控制电路示例。

         Figure 2 shows an example load switch control circuit for an N-channel pass transistor. A logic signal from the system power management control circuitry turns the load switch on and off via a small-signal NMOS transistor, Q1. When EN is LOW, Q1 is off and the pass transistor gate is pulled up to VGATE to keep it turned on. When EN is HIGH, Q1 turns on, the pass transistor gate is pulled to ground, and the load switch turns off. Resistor R1 is selected so that milliamps of current or less flow through R1 when Q1 is on.

        图2显示了n通道通过晶体管的负载开关控制电路的示例。来自系统电源管理控制电路的逻辑信号通过小功率NMOS晶体管Q1打开和关闭负载开关。当EN较低时，Q1关闭，并拉动通晶体管栅极直到VGATE来保持它的打开状态。当EN为高时，Q1打开，通过晶体管栅极被拉到地面，负载开关关闭。选择电阻R1，使Q1接通时电流毫安或更少流过R1。

        A standard range is 1 k – 10 k. An additional voltage source, VGATE, is needed to keep the gate-to-source forward biased. As expressed in Equation 2, the gate voltage must be larger than the sum of the output voltage and the threshold voltage. This may be undesirable for systems that do not have an extra voltage rail available.

        一般电阻的范围为1k到10k。还需要一个额外的电压源VGATE来保持从门到源的正向有偏差。如式2所示，栅极电压必须大于输出电压和阈值电压之和。这对于没有额外电压轨道的系统可能是不可取的。

        Figure 3 shows an example load switch contr circuit for a P-channel pass transistor. As with the N-channel example, a logic signal from the system power management control circuitry turns the load switch on and off via a small-signal NMOS transistor, Q1. When EN is LOW, Q1 is off and the gate is pulled up to VIN. When EN is HIGH, Q1 turns on, the pass transistor gate is pulled to ground, and the load switch turns on. As long as the input voltage rail is higher than the threshold voltage of the PMOS transistor, it will turn on when EN is HIGH without the need of an additional voltage source. As with the N-channel control circuit, resistor R1 is selected so that milliamps of current or less flow through R1 when Q1 is on. A standard range is 1 k – 10 k.

        图3显示了P通道通过晶体管的负载开关控制电路的示例。与N-信道示例一样，来自系统电源管理控制电路的逻辑信号通过小功率NMOS晶体管Q1打开和关闭负载开关。当EN较低时，Q1关闭，门被拉至VIN。当EN高时，Q1打开，通过晶体管栅极被拉到地面，负载开关打开。只要输入电压轨高于PMOS晶体管的阈值电压，当EN为HIGH时它将打开，而不需要额外的电压源。与n通道控制电路一样，选择电阻R1，使Q1接通时电流流过R1。标准范围为1k-10k。

        For both control circuit implementations, the small-signal NMOS transistor, Q1, can be integrated into the same package as the pass transistor.

        对于这两种控制电路实现，小功率NMOS晶体管Q1可以集成到与通过晶体管集成到相同的封装中。

Efficiency Considerations

        Efficiency is critical to the success of the overall power management of the system. In a load switch circuit, the load current flows directly through the pass transistor when it is turned on. Therefore, the main power loss is the conduction loss.

        效率对系统整体电力管理的成功至关重要。在负载开关电路中，负载电流在接通时直接流过通过晶体管。因此，主要的功率损耗是传导损耗。

PLOSS  = I LOAD 2  * RDS(on)     (eq. 4)

        The RDS(ON) of the pass transistor causes a voltage drop between the input voltage and the output voltage, as shown in Equation 5. For applications requiring high load currents or low voltage rails, this voltage drop becomes critical. The voltage drop will increase as the load current increases, and the voltage drop at maximum load must be taken into consideration when selecting the pass transistor.

        通过晶体管的RDS(ON)导致输入电压和输出电压之间的电压降，如式5所示。对于需要高负载电流或低电压导轨的应用，这种电压降变得至关重要。电压降会随着负载电流的增加而增加在选择通过晶体管时，必须考虑到最大负载时的电压降。

VOUT = VIN - I LOAD * RDS(on)   (eq. 5)

        As discussed in previous sections, the N-channel MOSFET has an RDS(on) advantage over the P-channel MOSFET for a given die size. The RDS(on) of an N-channel device can be two times lower than the RDS(on) of a P-channel device of similar die area. This difference is most prominent at higher currents, but the N-channel RDS(on) advantage becomes less prominent at lower currents. For applications such as cell phones and other portable low power devices, higher efficiency can be   attained using a P-channel pass transistor, with the advantage of a simpler control circuit. To illustrate this, let’s assume that a 30 m N-channel transistor and a 50 m P-channel transistor have similar die size. The efficiency impact of the two devices will be examined for a high current application and a low current application.

        如前所述，对于给定的die尺寸，N通道MOSFET比P通道MOSFET具有RDS(on)优势。N通道装置的RDS可以比P通道装置的RDS（开）低两倍。这种差异在较高电流时最为显著，但n通道RDS（开）优势在较低电流时变得不那么显著。对于手机和其他便携式低功率设备等应用，使用p通道通道晶体管可以获得更高的效率，具有更简单的控制电路的优点。为了说明这一点，让我们假设一个30m  n通道晶体管和一个50m    p通道晶体管具有相似的die大小。这两种装置的效率影响将被研究为高电流的应用和低电流的应用。

        For the first example, consider an application that requires a maximum load current of 10 A. Using Equations 4 and 5, the power loss at the maximum load is calculated to be 3 W for the N-channel transistor, and the voltage drop across the transistor is 300 mV. The power loss at the maximum load is 5 W for the P-channel transistor, and the voltage drop across the transistor is 500 mV.

        对于第一个例子，考虑一个需要最大负载电流为10A的应用。利用公式4和公式5，计算出n通道晶体管的最大负载下的功率损耗为3W，并且晶体管上的电压降为300mV。在最大负荷时的功率损耗对于p通道晶体管为5W，且在该晶体管上的电压降为500mV。

        Now consider an application in which the maximum current is 2 A. The power loss at maximum load is 120 mW for the N-channel device and 200 mW for the p-channel device. The voltage drop for the N-channel transistor is 60 mV and is 100 mV for the P-channel transistor.

        现在考虑一个最大电流为2A的应用。n通道器件在最大负载下的功率损耗为120mW，p通道器件为200mW。n通道晶体管的电压降为60mV，p通道晶体管的电压降为100mV。

        As a final example, consider an application with an 850 mA maximum load current. The 30 m N-channel transistor’s power loss is 21.7 mW compared to the 36.1 mW power loss of the 50 m P-channel transistor of similar die size. For low current applications, the N channel RDS(ON) advantage becomes negligible. P-channel pass transistors can be designed to have RDS(on) as low as 8 m. Low RDS(on) is critical for maximizing the efficiency of the load switch circuit and minimizing the voltage drop across the pass transistor. The specific conditions of the load switch application must be considered to make the final decision to use a PMOS or NMOS pass transistor.

        作为最后一个例子，考虑一个最大负载电流为850mA的应用程序。30m  n通道晶体管的功率损耗为21.7mW，而类似die尺寸的50m  p通道晶体管的功率损耗为36.1mW。对于低电流应用，n通道RDS(ON)的优势可以忽略不计。P通道通晶体管可设计为RDS（开）低至8m。低RDS（开启）对于最大化负载开关电路的效率和降低通过通道晶体管的压降至关重要。在最终决定使用PMOS或NMOS通晶体管时，必须考虑负载开关应用的具体条件。

Gate-to-Source Voltage Considerations

        The applied gate-to-source voltage of the pass transistor directly affects the efficiency of the circuit because RDS(on) is inversely proportional to the applied gate-to-source voltage. Figure 4 shows an example RDS(on) curve over a VGS range.

        通过晶体管施加的栅源电压直接影响电路的效率，因为RDS（接通）与施加的栅源电压成反比。图4显示了一个在VGS范围内的RDS(on)曲线的示例。

         The available VGS of the circuit must be considered when selecting the pass transistor. Operating too close to the knee of the RDS(on) curve can lead to higher conduction losses. Any small change in the gate-to-source voltage could result in a large change in the RDS(on)。

        在选择通态晶体管时，必须考虑电路的可用VGS。操作过靠近RDS（开启）曲线的转折点可能会导致更高的传导损失。栅极到源极电压的任何微小变化都可能导致RDS(on)的巨大变化。

Turn-on Considerations

        Proper turn-on of the load switch pass transistor is critical for maximizing circuit performance and maintaining safe operation of the individual components. Optimal turn-on speed depends on the needs of the specific application and the device parameters of the selected load switch. If the turn-on speed is too fast, a transient current spike occurs on the input voltage supply, known as inrush current.

        正确接通负载开关通晶体管对于最大化电路性能和保持单个部件的安全运行至关重要。最佳接通速度取决于特定应用的需要和所选负载开关的器件参数。如果接通速度过快，输入电压电源上出现瞬态电流峰值，称为涌电流。

Inrush Current

        Inrush current occurs when the load switch is first turned on and is connected to a capacitive load, as shown in Figure 5. The capacitive load could be a battery, a DC:DC circuit, or other sub-circuit. The turn-on speed of the pass transistor directly influences the amount of inrush current seen on the input of the load switch. Inrush current causes a dip in the input supply voltage that can adversely impact the functionality of the entire system. Likewise, inrush current spikes can potentially damage the load switch circuit components or reduce the lifetime of the components.

        当负载开关第一次打开并连接到电容式负载时，就会发生涌入电流，如图5所示。电容式负载可以是电池、直流：直流电路或其他子电路。通过晶体管的接通速度直接影响负载开关输入端的电涌电流。涌电流会导致输入电源电压下降，从而对整个系统的功能产生不利影响。同样，涌电流峰值可能损坏负载开关电路元件或降低元件的使用寿命。

 

        When the load switch is first turned on, an inrush current event occurs on the input as the CLOAD is charged. This can be seen in Equation 6:

        当负载开关第一次打开时，当CLOAD充电时，输入端会发生涌入电流事件。电流大小如公式6：

I inrush  = CLOAD  * dV /dt       (eq. 6)

        The faster the device switches on, the higher the inrush current will be. This potentially harmful inrush current can be reduced by controlling the load switch turn-on characteristics. Figure 6 shows the simplified MOSFET turn-on transfer curves. There are four main regions for device turn-on, and each will be briefly addressed.

        器件开通越快，涌电流就越高。这种潜在的有害的涌入电流可通过控制开关的开启特性来减少。图6显示了简化的MOSFET开启传输曲线。器件开启有四个主要区域，每个区域都将简要讨论。

 

        During Region 1, VSG increases until it reaches VTH. Because the device is off, VSD remains at VDD. During Region 2, VSG rises above the VTH and the device begins to turn on. Additionally, ID increases to the final load current and CGS charges.

        在区域1期间，VSG会增加，直到达到VTH。由于器件关闭，VSD仍保持在VDD。在区域2期间，VSG超过VTH，器件开始打开。此外，ID增加到最终的负载电流和CGS电荷。

        In Region 3, VSG remains constant as VSD decreases to its saturation level, and CGD charges. During Region 4, both CGS and CGD are fully charged, the device is fully on, and VSG rises to its final drive voltage, VDR. The plateau voltage, VPL,is defined as:

        在区域3中，当VSD下降到其饱和水平和CGD电荷时，VSG保持不变。在区域4期间，CGS和CGD都充满电，器件全开，VSG上升到其最终驱动电压VDR。平台电压VPL的定义为：

                                                        VPL = Vth + I LOAD / gfs   (eq. 7)

        In order to control the turn-on speed of the load switch, an external resistor R1 and external capacitor C1 are added to the load switch circuit as shown in Figure 7.

        为了控制负载开关的接通速度，在负载开关电路中添加了外部电阻R1和外部电容器C1，如图7所示。

 

        The selection of R1, R2 and C1 is very important to the performance of the load switch circuit. C1 must be much larger than the CGD of the load switch device so this capacitance will dominate over CGD. By placing C1 between the drain and source of the pass transistor, Region 3 of the VSD curve becomes linear and the MOSFET slew-rate, dVSD/dt, can be controlled。

        R1、R2、C1的选择对负载开关电路的性能非常重要。C1必须比负载开关的CGD大得多，因此该电容将超过CGD。通过将C1放置在通过晶体管的漏极和源极之间，VSD曲线的区域3变为线性，并且可以控制MOSFET得dVSD/dt

        R1 and R2 form a voltage divider that determines the voltage seen at the gate of the pass transistor. R1 and R2 can be calculated by using Equation 8 when the small-signal N-channel device is on.

        R1和R2形成分压器，确定通过晶体管栅极处的电压。当小信号n通道器件接通时，可以用公式8计算r1和r2。

     In order to ensure that VSG does not exceed the maximum rating of the device, VSG,MAX is used. VSG,MAX can be found in the device datasheet (see Figure 8). R2 is the pull-up resistordescribed in previous sections, and is recommended to be between 1 k and 10 k.

         为确保VSG不超过该器件的最大额定值，我们使用VSG、MAX来确定电阻值。VSG、MAX可以在器件数据表中找到（见图8）。R2是前几节中描述的上拉电阻器，建议其值在1k到10k之间。

        R1 and C1 determine the turn-on speed of the pass transistor. C1 can be calculated by using Equation 9, where IINRUSH is the desired maximum inrush current for the load switch circuit.

        R1和C1确定通态晶体管的开通速度。C1可以用公式9计算，其中IINRUSH是负载开关电路期望的最大涌电流。

 

 

        Plugging Equation 7 into Equation 9, C1 becomes:

        将公式7代入公式9、C1变成：

 

        For many designs, the equivalent CLOAD may be an unknown. If this is the case, CLOAD can be estimated from the measured inrush current waveform of the circuit without the addition of R1 and C1. Figure 9 shows an example inrush current waveform for a load switch circuit similar to Figure 5.

        对于许多设计，等效的CLOAD可能是一个未知的。如果是这种情况，CLOAD可以从测量的电路的涌入电流波形估计CLOAD，而不添加R1和C1。图9显示了类似于图5的负载开关电路的涌电流波形示例。

        The load capacitance, CLOAD, can be estimated using the following equation:

        负载电容，CLOAD，可用如下公式进行估计：

CLOAD  =  1/2 * ▲t *▲I (eq. 11)

        For the example current waveform shown in Figure 9, CLOAD is estimated as:

        对于图9所示的电流波形示例，CLOAD估计为：

CLOAD =1/2 * 1.6 us 18 A = 1.28 F

Inrush Current Example 

        Consider the P-channel load switch circuit shown in Figure 7 with the following parameters:

        考虑图7所示的P通道负载开关电路，该负载开关电路的参数如下：

 

        First, R1 and R2 must be selected. For this example, a 1 k resistor was selected for R2. R1 was calculated by rearranging Equation 8 and solving for R1:

        首先，必须选择r1和r2。对于这个例子，我们为r2选择了一个1k的电阻器。r1的计算方法是重新排列公式8，并求解r1：

 

        Next, C1 is calculated using Equation 10 and the parameters in Table 1.

        接下来，使用公式10和表1中的参数来计算C1。

 

        Therefore, for the example circuit, the inrush current will be limited to 3 A by selecting a 1 k pull-up resistor (R1), a 250 resistor for R2 and a 10 nF capacitor for C1.

        因此，对于示例电路，通过选择1k上拉电阻(R1)、R2的250电阻和C1的10nF电容器，将涌电流限制为3A。

Turn-on Speed

        Turn-on speed plays an important role in the behavior of the load switch. As mentioned, a fast device turn-on creates an inrush current. A softer turn-on reduces this current spike. However, caution must be taken when slowing down the MOSFET turn-on.

        开启速度对负载开关的行为起着重要的作用。如前所述，快速打开器件会产生涌电流。一个较软的开启可以减少浪涌的峰值。但是，在减缓MOSFET的开启时，必须谨慎行事。

        Figure 10 shows a standard load switch datasheet transfer curve. Drain current versus gate-to-source voltage is plotted at three different temperatures.

        图10显示了一个标准负载开关手册的传输曲线。在三种不同的温度下，绘制了漏源电流与栅极电压的关系。

         All three temperature curves will intersect at a specific VGS. This point is known as the inflection point. For a VGS above the inflection point, RDS(on) increases as temperature increases. Thus, as the device heats up, cells that are carrying higher current will become more resistive and current will be shared with cells carrying lower current. This MOSFET property creates a uniform current sharing across all the cells. Below the inflection point, the MOSFET behaves more like a bipolar transistor. As the device heats up, a cell with higher current than the surrounding cells will continue to take more current. If the device remains within this transition region for too long, thermal runaway can occur.

        所有三条温度曲线都将在一个特定的VGS处相交。这一点被称为拐点。对于高于拐点的VGS，RDS（开）随温度升高而增加。因此，随着器件升温，携带更高电流的单元内阻变高，电流将与携带较低电流的单元共享（mos并联的考虑）。此MOSFET属性可在所有单元格之间创建统一的电流共享。在拐点以下，MOSFET表现得更像一个双极晶体管。随着器件的升温，电流比周围电池更高的电池将继续承受更多的电流。如果器件在这个过渡区域内停留的时间过长，就会发生热失控。

        The load switch should be operated with a VGS above the inflection point to ensure proper device function. The threshold voltage for the example device shown in Figure 10 is around 0.8 V. The inflection point occurs around 1.75 V. For the example device, it is recommended to operate at a VGS of 1.8 V or higher.

        负荷开关应在拐点上方运行VGS，以确保器件功能正常。图10中所示的示例器件的阈值电压约为0.8V。拐点发生在1.75V左右。对于示例器件，建议在1.8V或更高的VGS下工作。

Safe Operating Area

        The Safe Operating Area (SOA) defines the safe operating conditions of the load switch. Operation outside of this region can degrade the performance, reliability and lifetime of the device, and can potentially damage other components within the system.

        安全操作区域(SOA)定义了负载开关的安全运行条件。在此区域之外的操作可能会降低器件的性能、可靠性和使用寿命，并可能损坏系统内的其他组件。

The load switch must have a continuous current rating greater than the maximum load current of the application. Likewise, the MOSFET must not be operated outside of the maximum VDS and VGS specifications. The device datasheet specifies the absolute maximum ratings and also contains a figure showing the Safe Operating Area (SOA). The designer must evaluate whether the device will operate within its specified SOA for the application.

        负载开关的连续额定电流必须大于应用的最大负载电流。同样，MOSFET不得在最大VDS和VGS规格之外运行。器件数据表指定了绝对最大额定值，并包含一个显示安全操作区域(SOA)的图。设计人员必须评估该器件是否会运行在其应用程序指定的SOA内。

        Figure 11 shows an example MOSFET SOA for an N-channel device. The outer boundaries of the safe operating area are determined by: the RDS(on) at maximum junction temperature, the maximum drain current IDM, and the rated breakdown voltage VDSS of the device. IDM is limited by the package, source wires, gate wires and die characteristics.

        图11显示了一个n通道器件的MOSFET  SOA示例。安全操作区域的外部边界由：最高结温度下的RDS（开）、最大漏极电流IDM和装置的额定击穿电压VDSS确定。IDM受到封装、源线、栅极线和die特性的限制。

 

        The basic power and current equations used to generate the SOA curve are:

        用于生成SOA曲线的基本功率和电流方程有：

 

        First, the outer boundaries of the SOA are drawn: the maximum ID and VDS lines. Next, the RDS(on) boundary is drawn by using Equations 12 and 13 to determine the end points, and the slope of the RDS(on) boundary line is:

        首先，绘制SOA的外部边界：最大ID线和VDS线。接下来，利用公式12和13绘制RDS(on)边界，以确定终点，并且RDS(on)边界线的斜率为：

         The DC line is determined by the maximum continuous power the device can dissipate. The continuous power dissipation is specified in the device datasheet. The DC line intersects the outer SOA boundaries in two places: at the RDS(on) limit and at the VDS limit. Additional lines are plotted for a single pulse of 10 ms, 1 ms, 100 s and 10 s duration. The safe operation region is located within theouter IDMAX and VDSMAX limits, and underneath the RDS(on), DC and single pulse lines.

        直流线由该器件可耗散的最大连续功率决定。连续功耗在器件数据表中规定。直流线相交于外部SOA边界：RDS(On)极限和VDS极限。绘制了10ms、1ms、100s和10s的单脉冲的额外线。安全操作区域位于本系统内部外部IDMAX和VDSMAX限制，以及在RDS（开）、直流和单脉冲线。

        The example MOSFET device from Figure 11 has the following datasheet specifications:

        图11中的MOSFET器件示例具有以下数据表规范：

         The RDS(on) line for the Figure 11 example MOSFET can be drawn using equations 12, 13 and the values presented in Table 2. The first end-point is located at a VDS of 0.1 V, and the second end point is located at the ID limit of 45 A.

        图11示例MOSFET的RDS(on)线可以使用方程12、13和表2中所示的值来绘制。第一终点位于一个为0.1V的VDS，第二终点位于ID极限为45A。

        Similarly, the DC line can be drawn using Equations 12 and 13 to calculate the end points. The first DC line end-point is at a VDS of 30 V. Using Equation 12 and the PD value presented in Table 2, the current at 30 VDS iscalculated to be 0.03 A. The second end-point is where the DC line intersects the RDS(on) boundary. Therefore, the current can be calculated using Equation 13 and then plugging the calculated drain current into Equation 12 to determine the corresponding voltage. For this example MOSFET, the DC line intersects the RDS(ON) boundary at 0.18 V and 5.5 A. The calculated VDS and ID values can be verified with Figure 11.

        同样地，可以使用公式12和13绘制直流线来计算终点。第一个直流线终点的VDS为30V。使用公式12和表2所示的PD值，在30VDS处的电流计算为0.03A。第二个终点是直流线与RDS（上）边界相交的位置处。因此，可以用公式13计算出电流，然后将计算出的漏极电流插入公式12，以确定相应的电压。对于本例MOSFET，直流线在0.18V和5.5A处与RDS(ON)边界相交。计算出的VDS和ID值可以用图11进行验证。

        The single-pulse lines are calculated using the same methodology and equations as for the DC line, but using the power dissipation for a single pulse of: 10 ms, 1 ms, 100 s and 10 s.

        单脉冲线的计算方法采用与直流线相同的方法和方程式，但单脉冲的功耗分别为：10ms、1ms、100s和10s。