STM32 I2C clock stretching

最新推荐文章于 2024-05-19 22:09:44 发布

cyang812

最新推荐文章于 2024-05-19 22:09:44 发布

阅读量937

点赞数

分类专栏： STM32学习笔记文章标签： stm32 嵌入式硬件单片机

本文链接：https://blog.csdn.net/u011303443/article/details/131904663

版权

STM32学习笔记专栏收录该内容

27 篇文章 3 订阅

订阅专栏

STM32 I2C clock stretching

In an I2C communication, the master device determines the clock speed. Unlike RS232 the I2C bus provides an explicit clock signal which relieves master and slave from synchronizing exactly to a predefined baud rate.

However, there are situations where an I2C slave is not able to co-operate with the clock speed given by the master and needs to slow down a little. This is done by a mechanism referred to as clock stretching.

An I2C slave is allowed to hold down the clock if it needs to reduce the bus speed. The master, on the other hand, is required to read back the clock signal after releasing it to the high state and wait until the line has actually gone high.

在这里插入图片描述