AM335X开发——设备树下增加SRAM、FPGA的GPMC设备节点

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最近在做嵌入式的开发,调试的是一块搭载了AM3359、AM4379以及Cyclone10三个CPU的板子。三者的通讯主要是通过GPMC总线来实现,数据存储在一块大小为256KB的SRAM中,数据交互则通过Cyclone10这块FPGA上的双口RAM来实现。其中,AM3359这块CPU上运行了linux-rt-4.4.32实时内核。在这里,记录了GPMC调试的一些问题以及基础知识,方便后续的查阅。

 一、GPMC简介

GPMC:General-purpose Memory Controller (通用存储器控制器)

特点:

1.灵活的 8 位和 16 位异步存储器接口

2.具有多达7个片选

3.支持NAND、NOR、复用NOR和SRAM

4.最大支持512MB的片外存储器连续地址空间的访问 

 

二、GPMC与存储器的连接

1.与16位的地址数据复用存储器连接:

2.与16位的非复用存储器连接:

3.与8位的NAND FLASH连接:

 

三、7个配置寄存器的定义

1、配置设备类型                                                                                 GPMC_CONFIG1

2、配置访问时序,主要读写时序                                                        GPMC_CONFIG2~6

3、配置基地址、容量(即掩码地址)、使能CS信号                          GPMC_CONFIG7

 

四、片选地址区域的划分

片选地址区域的划分主要由GPMC_CONFIG7_i[11-8]来确定当前片选地址空间的大小,GPMC_CONFIG7_i [6]控制片选引脚, GPMC_CONFIG7_i [5-0]确定当前片选的起始地址。

疑问:上图中的地址空间配置是怎样的,cpu如何选中设备?

Mask address 最小16M ,地址空间的跨度为0 ~ 0x00FF FFFF(低24位)。

Base address 由地址线的高8位决定,这个地址与当前的片选相关联。

例子:

GPMC_CONFIG7_0: 基地址规划为0x08,大小划归为16MB(0x00FF FFFF)

            起始地址:0x0800 0000

            结束地址: 0x08FF FFFF

GPMC_CONFIG7_2: 基地址规划为0x0A,大小规划为128MB(0x07FF FFFF)

          起始地址:0x0A00 0000,

          结束地址为0x0A00 0000 + 0x07FF FFFF=0x11FF FFFF

CPU访问设置好的地址范围,对应的片选引脚就会被拉低,从而选中设备

五、设备树的配置

linux内核有关gpmc的讲解可参考内核目录的下列文件:

(1)linux-rt-4.4.32/Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt

(2)linux-rt-4.4.32/Documentation/devicetree/bindings/mtd/gpmc-nor.txt

(3)linux-rt-4.4.32/Documentation/devicetree/bindings/mtd/gpmc-nand.txt

这些官方说明文档会针对设备节点的参数做一个比较详细的解释。

下面列举一下已经调试好的设备树代码:

1.NAND flash设备树的配置

调试的板子上使用的是一个8位的nandflash,型号为S34ML04G2,512MB。

①引脚配置

nandflash_pins_s0: nandflash_pins_s0 {
    pinctrl-single,pins = <
        AM33XX_IOPAD(0x800, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad0.gpmc_ad0 */
        AM33XX_IOPAD(0x804, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad1.gpmc_ad1 */
        AM33XX_IOPAD(0x808, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad2.gpmc_ad2 */
        AM33XX_IOPAD(0x80c, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad3.gpmc_ad3 */
        AM33XX_IOPAD(0x810, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad4.gpmc_ad4 */
        AM33XX_IOPAD(0x814, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad5.gpmc_ad5 */
        AM33XX_IOPAD(0x818, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad6.gpmc_ad6 */
        AM33XX_IOPAD(0x81c, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_ad7.gpmc_ad7 */

        AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE0))   /*gpmc_wait0.gpmc_wait0 */
        AM33XX_IOPAD(0x87c, (PIN_OUTPUT | MUX_MODE0))         /*gpmc_csn0.gpmc_csn0  */
        AM33XX_IOPAD(0x890, (PIN_OUTPUT | MUX_MODE0))   /*gpmc_advn_ale.gpmc_advn_ale */
        AM33XX_IOPAD(0x894, (PIN_OUTPUT | MUX_MODE0))   /*gpmc_oen_ren.gpmc_oen_ren */
        AM33XX_IOPAD(0x898, (PIN_OUTPUT | MUX_MODE0))   /*gpmc_wen.gpmc_wen */
        AM33XX_IOPAD(0x89c, (PIN_OUTPUT | MUX_MODE0))   /*gpmc_be0n_cle.gpmc_be0n_cle */
    >;
};

②增加GPMC结点

&gpmc {
        /* When enabling GPMC, disable eMMC */
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&nandflash_pins_s0>;
        ranges = <0 0 0x08000000 0x1000000>;    /* CS0: 16MB for NAND */
...

}

 

③在GPMC节点下添加NAND节点

(1)配置NAND的片选引脚、Base address 和Mask address。

(2)配置NAND的各项参数。

(3)分区。

&gpmc {
        /* When enabling GPMC, disable eMMC */
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = <&nandflash_pins_s0>;
        ranges = <0 0 0x08000000 0x1000000>;    /* CS0: 16MB for NAND */
        nand@0,0 {
                compatible = "ti,omap2-nand";
                reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
                interrupt-parent = <&gpmc>;
                interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
                             <1 IRQ_TYPE_NONE>; /* termcount */
                rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
                ti,nand-ecc-opt = "bch8";
                ti,elm-id = <&elm>;
                nand-bus-width = <8>;
                gpmc,device-width = <1>;
                gpmc,sync-clk-ps = <0>;
                gpmc,cs-on-ns = <0>;
                gpmc,cs-rd-off-ns = <44>;
                gpmc,cs-wr-off-ns = <44>;
                gpmc,adv-on-ns = <6>;
                gpmc,adv-rd-off-ns = <34>;
                gpmc,adv-wr-off-ns = <44>;
                gpmc,we-on-ns = <0>;
                gpmc,we-off-ns = <40>;
                gpmc,oe-on-ns = <0>;
                gpmc,oe-off-ns = <54>;
                gpmc,access-ns = <64>;
                gpmc,rd-cycle-ns = <82>;
                gpmc,wr-cycle-ns = <82>;
                gpmc,bus-turnaround-ns = <0>;
                gpmc,cycle2cycle-delay-ns = <0>;
                gpmc,clk-activation-ns = <0>;
                gpmc,wr-access-ns = <40>;
                gpmc,wr-data-mux-bus-ns = <0>;
                /* MTD partition table */
                /* All SPL-* partitions are sized to minimal length
                 * which can be independently programmable. For
                 * NAND flash this is equal to size of erase-block */
                #address-cells = <1>;
                #size-cells = <1>;

                partition@0 {
                        label = "NAND.SPL";
                        reg = <0x00000000 0x000020000>;
                };
                partition@1 {
                        label = "NAND.SPL.backup1";
                        reg = <0x00020000 0x00020000>;
                };
                partition@2 {
                        label = "NAND.SPL.backup2";
                        reg = <0x00040000 0x00020000>;
                };
                partition@3 {
                        label = "NAND.SPL.backup3";
                        reg = <0x00060000 0x00020000>;
                };
                partition@4 {
                        label = "NAND.u-boot-spl-os";
                        reg = <0x00080000 0x00040000>;
                };
                partition@5 {
                        label = "NAND.u-boot";
                        reg = <0x000C0000 0x00100000>;
                };
                partition@6 {
                        label = "NAND.u-boot-env";
                        reg = <0x001C0000 0x00020000>;
                };
                partition@7 {
                        label = "NAND.u-boot-env.backup1";
                        reg = <0x001E0000 0x00020000>;
                };
                partition@8 {
                        label = "NAND.kernel";
                        reg = <0x00200000 0x00800000>;
                };
                partition@9 {
                        label = "NAND.file-system";
                        reg = <0x00A00000 0x1F600000>;
                };
        };
};

2.NOR flash/SRAM设备树的配置

调试的板子上使用的SRAM是IS61LV25616AL这个型号,有18根地址线,16根数据线。连接的方式为AD复用模式(Address/Data-Multiplexed)。SRAM的访问方式和NOR是一致的,所以配置方法也是一样。

①引脚配置

sram_x16_default: sram_x16_default {
    pinctrl-single,pins = <
        AM33XX_IOPAD(0x800, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad0.gpmc_ad0*/
        AM33XX_IOPAD(0x804, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad1.gpmc_ad1*/
        AM33XX_IOPAD(0x808, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad2.gpmc_ad2*/
        AM33XX_IOPAD(0x80c, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad3.gpmc_ad3*/
        AM33XX_IOPAD(0x810, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad4.gpmc_ad4*/
        AM33XX_IOPAD(0x814, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad5.gpmc_ad5*/
        AM33XX_IOPAD(0x818, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad6.gpmc_ad6*/
        AM33XX_IOPAD(0x81c, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad7.gpmc_ad7*/
	AM33XX_IOPAD(0x820, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad8.gpmc_ad8*/
	AM33XX_IOPAD(0x824, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad9.gpmc_ad9*/
        AM33XX_IOPAD(0x828, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad10.gpmc_ad10*/
        AM33XX_IOPAD(0x82c, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad11.gpmc_ad11*/
        AM33XX_IOPAD(0x830, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad12.gpmc_ad12*/
        AM33XX_IOPAD(0x834, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad13.gpmc_ad13*/
        AM33XX_IOPAD(0x838, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad14.gpmc_ad14*/
        AM33XX_IOPAD(0x83c, (PIN_INPUT_PULLUP | MUX_MODE0))  /* gpmc_ad15.gpmc_ad15*/

        AM33XX_IOPAD(0x8e0, (PIN_INPUT_PULLUP | MUX_MODE2))  /*gpmc_a1.gpmc_a1(a16)*/
        AM33XX_IOPAD(0x8e4, (PIN_INPUT_PULLUP | MUX_MODE2))  /*gpmc_a2.gpmc_a2(a17)*/
	AM33XX_IOPAD(0x8b8, (PIN_INPUT_PULLUP | MUX_MODE1))  /*gpmc_a6.gpmc_a6(a21)*/
        AM33XX_IOPAD(0x8bc, (PIN_INPUT_PULLUP | MUX_MODE1))  /*gpmc_a7.gpmc_a7(a22)*/

	AM33XX_IOPAD(0x870, (PIN_INPUT_PULLUP | MUX_MODE0)) /*gpmc_wait0.gpmc_wait0*/
	AM33XX_IOPAD(0x87c, (PIN_OUTPUT | MUX_MODE0))       /* gpmc_csn0.gpmc_csn0 */
        AM33XX_IOPAD(0x880, (PIN_OUTPUT | MUX_MODE0))       /* gpmc_csn1.gpmc_csn1 */
	AM33XX_IOPAD(0x884, (PIN_OUTPUT | MUX_MODE0))       /* gpmc_csn2.gpmc_csn2 */
	AM33XX_IOPAD(0x890, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_advn_ale.gpmc_advn_ale*/
        AM33XX_IOPAD(0x894, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_oen_ren.gpmc_oen_ren*/
        AM33XX_IOPAD(0x898, (PIN_OUTPUT | MUX_MODE0)) /* gpmc_wen.gpmc_wen */
        AM33XX_IOPAD(0x89c, (PIN_OUTPUT | MUX_MODE0)) /*gpmc_be0n_cle.gpmc_be0n_cle*/
    >;
};

②增加GPMC节点

&gpmc {
        /* When enabling GPMC, disable eMMC */
        status = "okay";
        pinctrl-names = "default";
        pinctrl-0 = </*&nandflash_pins_s0*/ &sram_x16_default>;
        ranges = <0 0 0x08000000 0x01000000>,   /* CS0 nand. Min partition = 16MB */
		 <1 0 0x01000000 0x01000000>,   /* CS1 sram. Min partition = 16MB */
		 <2 0 0x02000000 0x01000000>;   /* CS2 fpga. Min partition = 16MB */

...

}

③在GPMC节点下添加NOR节点

(1)配置NOR的片选引脚、Base address 和Mask address。

(2)配置NOR的各项参数。

(3)分区。(不是必须的)

		nor1@1,0 {
			compatible = "cfi-flash";
			linux,mtd-name= "intel,pf48f6000m0y1be";
		        #address-cells = <1>;
                        #size-cells = <1>;
			reg = <1 0 0x01000000>;
			bank-width = <2>;
			gpmc,mux-add-data = <2>;
			gpmc,cs-on-ns = <0>;
			gpmc,cs-rd-off-ns = <279>;
			gpmc,cs-wr-off-ns = <279>;
			gpmc,adv-on-ns = <18>;
			gpmc,adv-rd-off-ns = <72>;
			gpmc,adv-wr-off-ns = <72>;
			gpmc,oe-on-ns = <81>;
			gpmc,oe-off-ns = <252>;
			gpmc,we-on-ns = <81>;
			gpmc,we-off-ns = <252>;
			gpmc,rd-cycle-ns = <279>;
			gpmc,wr-cycle-ns = <279>;
			gpmc,access-ns = <171>;
			gpmc,wr-data-mux-bus-ns = <135>;
			gpmc,wr-access-ns = <279>;
	};

		nor2@2,0 {
			compatible = "cfi-flash";
			linux,mtd-name= "intel,pf48f6000m0y1be";
			reg = <2 0 0x01000000>;
			#address-cells = <1>;
                        #size-cells = <1>;
			bank-width = <2>;
			gpmc,mux-add-data = <2>;
			gpmc,cs-on-ns = <0>;
			gpmc,cs-rd-off-ns = <186>;
			gpmc,cs-wr-off-ns = <186>;
			gpmc,adv-on-ns = <12>;
			gpmc,adv-rd-off-ns = <48>;
			gpmc,adv-wr-off-ns = <48>;
			gpmc,oe-on-ns = <54>;
			gpmc,oe-off-ns = <168>;
			gpmc,we-on-ns = <54>;
			gpmc,we-off-ns = <168>;
			gpmc,rd-cycle-ns = <186>;
			gpmc,wr-cycle-ns = <186>;
			gpmc,access-ns = <114>;
			gpmc,wr-data-mux-bus-ns = <90>;
			gpmc,wr-access-ns = <186>;
	};

上面这里是设置了两个节点,一个是sram,一个是fpga,分别对应片选1和片选2。

 

六、注意事项

1.片选0在系统上电或者复位之后,自动会变为使能状态(低电平)。

Chip-select 0 is the only chip-select region enabled after either a power-up or a GPMC reset.

2.在设置sram或者nor的时候,需注意:

To select an address/data-multiplexed device, program the following register fields:

• GPMC_CONFIG1_i[11-10] DEVICETYPE field = 00

• GPMC_CONFIG1_i[9-8] MUXADDDATA bit = 10b

3. 掩码地址应该避免0010 和1001这两个值。

A mask value of 0010 or 1001 must be avoided because it will create holes in the chip-select address space.  

4.查看AM335X的数据手册,会发现GPMC在与外部的16位地址数据复用存储器连接时,地址线错开了一位来连接:

 这是由于AM335X的内部储存结构是以字节为单位的,但外部储存器的结构是以字为单位的。

         CPU地址		             16位存储器的地址
	0x00,0x01		0x00(0x1234)(此地址对应一个16bit的数据)
	0x02,0x03		0x01(0x5678)
	0x04,0x05		0x02(0xabcd)

        CPU地址线		16位存储器的地址
            A0		    	      x	
            A1		    	     A0	
            A2		    	     A1	
            A3		   	     A2	
            …		   	     … 	

 

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