stm32f10x_gpio.c源文件供自己参考

/**


  • @file stm32f10x_gpio.c
  • @author MCD Application Team
  • @version V3.5.0
  • @date 11-March-2011
  • @brief This file provides all the GPIO firmware functions.

  • @attention
  • THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  • WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
  • TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
  • DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
  • FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
  • CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  • © COPYRIGHT 2011 STMicroelectronics


*/

/* Includes ------------------------------------------------------------------*/
#include “stm32f10x_gpio.h”
#include “stm32f10x_rcc.h”

/** @addtogroup STM32F10x_StdPeriph_Driver

  • @{
    */

/** @defgroup GPIO

  • @brief GPIO driver modules
  • @{
    */

/** @defgroup GPIO_Private_TypesDefinitions

  • @{
    */

/**

  • @}
    */

/** @defgroup GPIO_Private_Defines

  • @{
    */

/* ------------ RCC registers bit address in the alias region ----------------*/
#define AFIO_OFFSET (AFIO_BASE - PERIPH_BASE)

/* — EVENTCR Register -----*/

/* Alias word address of EVOE bit */
#define EVCR_OFFSET (AFIO_OFFSET + 0x00)
#define EVOE_BitNumber ((uint8_t)0x07)
#define EVCR_EVOE_BB (PERIPH_BB_BASE + (EVCR_OFFSET * 32) + (EVOE_BitNumber * 4))

/* — MAPR Register —/
/
Alias word address of MII_RMII_SEL bit */
#define MAPR_OFFSET (AFIO_OFFSET + 0x04)
#define MII_RMII_SEL_BitNumber ((u8)0x17)
#define MAPR_MII_RMII_SEL_BB (PERIPH_BB_BASE + (MAPR_OFFSET * 32) + (MII_RMII_SEL_BitNumber * 4))

#define EVCR_PORTPINCONFIG_MASK ((uint16_t)0xFF80)
#define LSB_MASK ((uint16_t)0xFFFF)
#define DBGAFR_POSITION_MASK ((uint32_t)0x000F0000)
#define DBGAFR_SWJCFG_MASK ((uint32_t)0xF0FFFFFF)
#define DBGAFR_LOCATION_MASK ((uint32_t)0x00200000)
#define DBGAFR_NUMBITS_MASK ((uint32_t)0x00100000)
/**

  • @}
    */

/** @defgroup GPIO_Private_Macros

  • @{
    */

/**

  • @}
    */

/** @defgroup GPIO_Private_Variables

  • @{
    */

/**

  • @}
    */

/** @defgroup GPIO_Private_FunctionPrototypes

  • @{
    */

/**

  • @}
    */

/** @defgroup GPIO_Private_Functions

  • @{
    */

/**

  • @brief Deinitializes the GPIOx peripheral registers to their default reset values.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @retval None
    /
    void GPIO_DeInit(GPIO_TypeDef
    GPIOx)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

if (GPIOx == GPIOA)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOA, DISABLE);
}
else if (GPIOx == GPIOB)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOB, DISABLE);
}
else if (GPIOx == GPIOC)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOC, DISABLE);
}
else if (GPIOx == GPIOD)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOD, DISABLE);
}
else if (GPIOx == GPIOE)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOE, DISABLE);
}
else if (GPIOx == GPIOF)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOF, DISABLE);
}
else
{
if (GPIOx == GPIOG)
{
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, ENABLE);
RCC_APB2PeriphResetCmd(RCC_APB2Periph_GPIOG, DISABLE);
}
}
}

/**

  • @brief Deinitializes the Alternate Functions (remap, event control
  • and EXTI configuration) registers to their default reset values.
  • @param None
  • @retval None
    */
    void GPIO_AFIODeInit(void)
    {
    RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, ENABLE);
    RCC_APB2PeriphResetCmd(RCC_APB2Periph_AFIO, DISABLE);
    }

/**

  • @brief Initializes the GPIOx peripheral according to the specified
  •     parameters in the GPIO_InitStruct.
    
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_InitStruct: pointer to a GPIO_InitTypeDef structure that
  •     contains the configuration information for the specified GPIO peripheral.
    
  • @retval None
    /
    void GPIO_Init(GPIO_TypeDef
    GPIOx, GPIO_InitTypeDef* GPIO_InitStruct)
    {
    uint32_t currentmode = 0x00, currentpin = 0x00, pinpos = 0x00, pos = 0x00;
    uint32_t tmpreg = 0x00, pinmask = 0x00;
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
    assert_param(IS_GPIO_MODE(GPIO_InitStruct->GPIO_Mode));
    assert_param(IS_GPIO_PIN(GPIO_InitStruct->GPIO_Pin));

/---------------------------- GPIO Mode Configuration -----------------------/
currentmode = ((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x0F);
if ((((uint32_t)GPIO_InitStruct->GPIO_Mode) & ((uint32_t)0x10)) != 0x00)
{
/* Check the parameters /
assert_param(IS_GPIO_SPEED(GPIO_InitStruct->GPIO_Speed));
/
Output mode /
currentmode |= (uint32_t)GPIO_InitStruct->GPIO_Speed;
}
/
---------------------------- GPIO CRL Configuration ------------------------/
/
Configure the eight low port pins /
if (((uint32_t)GPIO_InitStruct->GPIO_Pin & ((uint32_t)0x00FF)) != 0x00)
{
tmpreg = GPIOx->CRL;
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
{
pos = ((uint32_t)0x01) << pinpos;
/
Get the port pins position /
currentpin = (GPIO_InitStruct->GPIO_Pin) & pos;
if (currentpin == pos)
{
pos = pinpos << 2;
/
Clear the corresponding low control register bits /
pinmask = ((uint32_t)0x0F) << pos;
tmpreg &= ~pinmask;
/
Write the mode configuration in the corresponding bits /
tmpreg |= (currentmode << pos);
/
Reset the corresponding ODR bit /
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BRR = (((uint32_t)0x01) << pinpos);
}
else
{
/
Set the corresponding ODR bit /
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSRR = (((uint32_t)0x01) << pinpos);
}
}
}
}
GPIOx->CRL = tmpreg;
}
/
---------------------------- GPIO CRH Configuration ------------------------/
/
Configure the eight high port pins /
if (GPIO_InitStruct->GPIO_Pin > 0x00FF)
{
tmpreg = GPIOx->CRH;
for (pinpos = 0x00; pinpos < 0x08; pinpos++)
{
pos = (((uint32_t)0x01) << (pinpos + 0x08));
/
Get the port pins position /
currentpin = ((GPIO_InitStruct->GPIO_Pin) & pos);
if (currentpin == pos)
{
pos = pinpos << 2;
/
Clear the corresponding high control register bits /
pinmask = ((uint32_t)0x0F) << pos;
tmpreg &= ~pinmask;
/
Write the mode configuration in the corresponding bits /
tmpreg |= (currentmode << pos);
/
Reset the corresponding ODR bit /
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPD)
{
GPIOx->BRR = (((uint32_t)0x01) << (pinpos + 0x08));
}
/
Set the corresponding ODR bit */
if (GPIO_InitStruct->GPIO_Mode == GPIO_Mode_IPU)
{
GPIOx->BSRR = (((uint32_t)0x01) << (pinpos + 0x08));
}
}
}
GPIOx->CRH = tmpreg;
}
}

/**

  • @brief Fills each GPIO_InitStruct member with its default value.
  • @param GPIO_InitStruct : pointer to a GPIO_InitTypeDef structure which will
  •     be initialized.
    
  • @retval None
    /
    void GPIO_StructInit(GPIO_InitTypeDef
    GPIO_InitStruct)
    {
    /* Reset GPIO init structure parameters values */
    GPIO_InitStruct->GPIO_Pin = GPIO_Pin_All;
    GPIO_InitStruct->GPIO_Speed = GPIO_Speed_2MHz;
    GPIO_InitStruct->GPIO_Mode = GPIO_Mode_IN_FLOATING;
    }

/**

  • @brief Reads the specified input port pin.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bit to read.
  • This parameter can be GPIO_Pin_x where x can be (0…15).
  • @retval The input port pin value.
    /
    uint8_t GPIO_ReadInputDataBit(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin)
    {
    uint8_t bitstatus = 0x00;

/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GET_GPIO_PIN(GPIO_Pin));

if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}

/**

  • @brief Reads the specified GPIO input data port.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @retval GPIO input data port value.
    /
    uint16_t GPIO_ReadInputData(GPIO_TypeDef
    GPIOx)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

return ((uint16_t)GPIOx->IDR);
}

/**

  • @brief Reads the specified output data port bit.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bit to read.
  • This parameter can be GPIO_Pin_x where x can be (0…15).
  • @retval The output port pin value.
    /
    uint8_t GPIO_ReadOutputDataBit(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin)
    {
    uint8_t bitstatus = 0x00;
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
    assert_param(IS_GET_GPIO_PIN(GPIO_Pin));

if ((GPIOx->ODR & GPIO_Pin) != (uint32_t)Bit_RESET)
{
bitstatus = (uint8_t)Bit_SET;
}
else
{
bitstatus = (uint8_t)Bit_RESET;
}
return bitstatus;
}

/**

  • @brief Reads the specified GPIO output data port.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @retval GPIO output data port value.
    /
    uint16_t GPIO_ReadOutputData(GPIO_TypeDef
    GPIOx)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

return ((uint16_t)GPIOx->ODR);
}

/**

  • @brief Sets the selected data port bits.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bits to be written.
  • This parameter can be any combination of GPIO_Pin_x where x can be (0…15).
  • @retval None
    /
    void GPIO_SetBits(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
    assert_param(IS_GPIO_PIN(GPIO_Pin));

GPIOx->BSRR = GPIO_Pin;
}

/**

  • @brief Clears the selected data port bits.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bits to be written.
  • This parameter can be any combination of GPIO_Pin_x where x can be (0…15).
  • @retval None
    /
    void GPIO_ResetBits(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
    assert_param(IS_GPIO_PIN(GPIO_Pin));

GPIOx->BRR = GPIO_Pin;
}

/**

  • @brief Sets or clears the selected data port bit.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bit to be written.
  • This parameter can be one of GPIO_Pin_x where x can be (0…15).
  • @param BitVal: specifies the value to be written to the selected bit.
  • This parameter can be one of the BitAction enum values:
  • @arg Bit_RESET: to clear the port pin
    
  • @arg Bit_SET: to set the port pin
    
  • @retval None
    /
    void GPIO_WriteBit(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin, BitAction BitVal)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
    assert_param(IS_GET_GPIO_PIN(GPIO_Pin));
    assert_param(IS_GPIO_BIT_ACTION(BitVal));

if (BitVal != Bit_RESET)
{
GPIOx->BSRR = GPIO_Pin;
}
else
{
GPIOx->BRR = GPIO_Pin;
}
}

/**

  • @brief Writes data to the specified GPIO data port.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param PortVal: specifies the value to be written to the port output data register.
  • @retval None
    /
    void GPIO_Write(GPIO_TypeDef
    GPIOx, uint16_t PortVal)
    {
    /* Check the parameters */
    assert_param(IS_GPIO_ALL_PERIPH(GPIOx));

GPIOx->ODR = PortVal;
}

/**

  • @brief Locks GPIO Pins configuration registers.
  • @param GPIOx: where x can be (A…G) to select the GPIO peripheral.
  • @param GPIO_Pin: specifies the port bit to be written.
  • This parameter can be any combination of GPIO_Pin_x where x can be (0…15).
  • @retval None
    /
    void GPIO_PinLockConfig(GPIO_TypeDef
    GPIOx, uint16_t GPIO_Pin)
    {
    uint32_t tmp = 0x00010000;

/* Check the parameters */
assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Pin));

tmp |= GPIO_Pin;
/* Set LCKK bit /
GPIOx->LCKR = tmp;
/
Reset LCKK bit /
GPIOx->LCKR = GPIO_Pin;
/
Set LCKK bit /
GPIOx->LCKR = tmp;
/
Read LCKK bit*/
tmp = GPIOx->LCKR;
/* Read LCKK bit*/
tmp = GPIOx->LCKR;
}

/**

  • @brief Selects the GPIO pin used as Event output.
  • @param GPIO_PortSource: selects the GPIO port to be used as source
  • for Event output.
  • This parameter can be GPIO_PortSourceGPIOx where x can be (A…E).
  • @param GPIO_PinSource: specifies the pin for the Event output.
  • This parameter can be GPIO_PinSourcex where x can be (0…15).
  • @retval None
    /
    void GPIO_EventOutputConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
    {
    uint32_t tmpreg = 0x00;
    /
    Check the parameters */
    assert_param(IS_GPIO_EVENTOUT_PORT_SOURCE(GPIO_PortSource));
    assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));

tmpreg = AFIO->EVCR;
/* Clear the PORT[6:4] and PIN[3:0] bits */
tmpreg &= EVCR_PORTPINCONFIG_MASK;
tmpreg |= (uint32_t)GPIO_PortSource << 0x04;
tmpreg |= GPIO_PinSource;
AFIO->EVCR = tmpreg;
}

/**

  • @brief Enables or disables the Event Output.
  • @param NewState: new state of the Event output.
  • This parameter can be: ENABLE or DISABLE.
  • @retval None
    /
    void GPIO_EventOutputCmd(FunctionalState NewState)
    {
    /
    Check the parameters */
    assert_param(IS_FUNCTIONAL_STATE(NewState));

*(__IO uint32_t *) EVCR_EVOE_BB = (uint32_t)NewState;
}

/**

  • @brief Changes the mapping of the specified pin.
  • @param GPIO_Remap: selects the pin to remap.
  • This parameter can be one of the following values:
  • @arg GPIO_Remap_SPI1             : SPI1 Alternate Function mapping
    
  • @arg GPIO_Remap_I2C1             : I2C1 Alternate Function mapping
    
  • @arg GPIO_Remap_USART1           : USART1 Alternate Function mapping
    
  • @arg GPIO_Remap_USART2           : USART2 Alternate Function mapping
    
  • @arg GPIO_PartialRemap_USART3    : USART3 Partial Alternate Function mapping
    
  • @arg GPIO_FullRemap_USART3       : USART3 Full Alternate Function mapping
    
  • @arg GPIO_PartialRemap_TIM1      : TIM1 Partial Alternate Function mapping
    
  • @arg GPIO_FullRemap_TIM1         : TIM1 Full Alternate Function mapping
    
  • @arg GPIO_PartialRemap1_TIM2     : TIM2 Partial1 Alternate Function mapping
    
  • @arg GPIO_PartialRemap2_TIM2     : TIM2 Partial2 Alternate Function mapping
    
  • @arg GPIO_FullRemap_TIM2         : TIM2 Full Alternate Function mapping
    
  • @arg GPIO_PartialRemap_TIM3      : TIM3 Partial Alternate Function mapping
    
  • @arg GPIO_FullRemap_TIM3         : TIM3 Full Alternate Function mapping
    
  • @arg GPIO_Remap_TIM4             : TIM4 Alternate Function mapping
    
  • @arg GPIO_Remap1_CAN1            : CAN1 Alternate Function mapping
    
  • @arg GPIO_Remap2_CAN1            : CAN1 Alternate Function mapping
    
  • @arg GPIO_Remap_PD01             : PD01 Alternate Function mapping
    
  • @arg GPIO_Remap_TIM5CH4_LSI      : LSI connected to TIM5 Channel4 input capture for calibration
    
  • @arg GPIO_Remap_ADC1_ETRGINJ     : ADC1 External Trigger Injected Conversion remapping
    
  • @arg GPIO_Remap_ADC1_ETRGREG     : ADC1 External Trigger Regular Conversion remapping
    
  • @arg GPIO_Remap_ADC2_ETRGINJ     : ADC2 External Trigger Injected Conversion remapping
    
  • @arg GPIO_Remap_ADC2_ETRGREG     : ADC2 External Trigger Regular Conversion remapping
    
  • @arg GPIO_Remap_ETH              : Ethernet remapping (only for Connectivity line devices)
    
  • @arg GPIO_Remap_CAN2             : CAN2 remapping (only for Connectivity line devices)
    
  • @arg GPIO_Remap_SWJ_NoJTRST      : Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST
    
  • @arg GPIO_Remap_SWJ_JTAGDisable  : JTAG-DP Disabled and SW-DP Enabled
    
  • @arg GPIO_Remap_SWJ_Disable      : Full SWJ Disabled (JTAG-DP + SW-DP)
    
  • @arg GPIO_Remap_SPI3             : SPI3/I2S3 Alternate Function mapping (only for Connectivity line devices)
    
  •                                    When the SPI3/I2S3 is remapped using this function, the SWJ is configured
    
  •                                    to Full SWJ Enabled (JTAG-DP + SW-DP) but without JTRST.   
    
  • @arg GPIO_Remap_TIM2ITR1_PTP_SOF : Ethernet PTP output or USB OTG SOF (Start of Frame) connected
    
  •                                    to TIM2 Internal Trigger 1 for calibration (only for Connectivity line devices)
    
  •                                    If the GPIO_Remap_TIM2ITR1_PTP_SOF is enabled the TIM2 ITR1 is connected to 
    
  •                                    Ethernet PTP output. When Reset TIM2 ITR1 is connected to USB OTG SOF output.    
    
  • @arg GPIO_Remap_PTP_PPS          : Ethernet MAC PPS_PTS output on PB05 (only for Connectivity line devices)
    
  • @arg GPIO_Remap_TIM15            : TIM15 Alternate Function mapping (only for Value line devices)
    
  • @arg GPIO_Remap_TIM16            : TIM16 Alternate Function mapping (only for Value line devices)
    
  • @arg GPIO_Remap_TIM17            : TIM17 Alternate Function mapping (only for Value line devices)
    
  • @arg GPIO_Remap_CEC              : CEC Alternate Function mapping (only for Value line devices)
    
  • @arg GPIO_Remap_TIM1_DMA         : TIM1 DMA requests mapping (only for Value line devices)
    
  • @arg GPIO_Remap_TIM9             : TIM9 Alternate Function mapping (only for XL-density devices)
    
  • @arg GPIO_Remap_TIM10            : TIM10 Alternate Function mapping (only for XL-density devices)
    
  • @arg GPIO_Remap_TIM11            : TIM11 Alternate Function mapping (only for XL-density devices)
    
  • @arg GPIO_Remap_TIM13            : TIM13 Alternate Function mapping (only for High density Value line and XL-density devices)
    
  • @arg GPIO_Remap_TIM14            : TIM14 Alternate Function mapping (only for High density Value line and XL-density devices)
    
  • @arg GPIO_Remap_FSMC_NADV        : FSMC_NADV Alternate Function mapping (only for High density Value line and XL-density devices)
    
  • @arg GPIO_Remap_TIM67_DAC_DMA    : TIM6/TIM7 and DAC DMA requests remapping (only for High density Value line devices)
    
  • @arg GPIO_Remap_TIM12            : TIM12 Alternate Function mapping (only for High density Value line devices)
    
  • @arg GPIO_Remap_MISC             : Miscellaneous Remap (DMA2 Channel5 Position and DAC Trigger remapping, 
    
  •                                    only for High density Value line devices)     
    
  • @param NewState: new state of the port pin remapping.
  • This parameter can be: ENABLE or DISABLE.
  • @retval None
    */
    void GPIO_PinRemapConfig(uint32_t GPIO_Remap, FunctionalState NewState)
    {
    uint32_t tmp = 0x00, tmp1 = 0x00, tmpreg = 0x00, tmpmask = 0x00;

/* Check the parameters */
assert_param(IS_GPIO_REMAP(GPIO_Remap));
assert_param(IS_FUNCTIONAL_STATE(NewState));

if((GPIO_Remap & 0x80000000) == 0x80000000)
{
tmpreg = AFIO->MAPR2;
}
else
{
tmpreg = AFIO->MAPR;
}

tmpmask = (GPIO_Remap & DBGAFR_POSITION_MASK) >> 0x10;
tmp = GPIO_Remap & LSB_MASK;

if ((GPIO_Remap & (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK)) == (DBGAFR_LOCATION_MASK | DBGAFR_NUMBITS_MASK))
{
tmpreg &= DBGAFR_SWJCFG_MASK;
AFIO->MAPR &= DBGAFR_SWJCFG_MASK;
}
else if ((GPIO_Remap & DBGAFR_NUMBITS_MASK) == DBGAFR_NUMBITS_MASK)
{
tmp1 = ((uint32_t)0x03) << tmpmask;
tmpreg &= ~tmp1;
tmpreg |= ~DBGAFR_SWJCFG_MASK;
}
else
{
tmpreg &= ~(tmp << ((GPIO_Remap >> 0x15)*0x10));
tmpreg |= ~DBGAFR_SWJCFG_MASK;
}

if (NewState != DISABLE)
{
tmpreg |= (tmp << ((GPIO_Remap >> 0x15)*0x10));
}

if((GPIO_Remap & 0x80000000) == 0x80000000)
{
AFIO->MAPR2 = tmpreg;
}
else
{
AFIO->MAPR = tmpreg;
}
}

/**

  • @brief Selects the GPIO pin used as EXTI Line.
  • @param GPIO_PortSource: selects the GPIO port to be used as source for EXTI lines.
  • This parameter can be GPIO_PortSourceGPIOx where x can be (A…G).
  • @param GPIO_PinSource: specifies the EXTI line to be configured.
  • This parameter can be GPIO_PinSourcex where x can be (0…15).
  • @retval None
    /
    void GPIO_EXTILineConfig(uint8_t GPIO_PortSource, uint8_t GPIO_PinSource)
    {
    uint32_t tmp = 0x00;
    /
    Check the parameters */
    assert_param(IS_GPIO_EXTI_PORT_SOURCE(GPIO_PortSource));
    assert_param(IS_GPIO_PIN_SOURCE(GPIO_PinSource));

tmp = ((uint32_t)0x0F) << (0x04 * (GPIO_PinSource & (uint8_t)0x03));
AFIO->EXTICR[GPIO_PinSource >> 0x02] &= ~tmp;
AFIO->EXTICR[GPIO_PinSource >> 0x02] |= (((uint32_t)GPIO_PortSource) << (0x04 * (GPIO_PinSource & (uint8_t)0x03)));
}

/**

  • @brief Selects the Ethernet media interface.
  • @note This function applies only to STM32 Connectivity line devices.
  • @param GPIO_ETH_MediaInterface: specifies the Media Interface mode.
  • This parameter can be one of the following values:
  • @arg GPIO_ETH_MediaInterface_MII: MII mode
    
  • @arg GPIO_ETH_MediaInterface_RMII: RMII mode    
    
  • @retval None
    */
    void GPIO_ETH_MediaInterfaceConfig(uint32_t GPIO_ETH_MediaInterface)
    {
    assert_param(IS_GPIO_ETH_MEDIA_INTERFACE(GPIO_ETH_MediaInterface));

/* Configure MII_RMII selection bit */
*(__IO uint32_t *) MAPR_MII_RMII_SEL_BB = GPIO_ETH_MediaInterface;
}

/**

  • @}
    */

/**

  • @}
    */

/**

  • @}
    */

/******************* © COPYRIGHT 2011 STMicroelectronics *END OF FILE/

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### 回答1: 这三个文件都与 STM32F10x 系列单片机的中断相关。 - stm32f10x_conf.h:该文件定义了 STM32F10x 系列单片机的中断优先级分组和中断向量表基地址等配置。需要根据具体的项目需求进行配置。 - stm32f10x_it.c:该文件是中断服务程序(Interrupt Service Routine,ISR)的源文件,其中包含了各个中断的具体处理函数。需要根据具体的中断类型在该文件中定义对应的 ISR。 - stm32f10x_it.h:该文件是中断服务程序的头文件,其中声明了各个 ISR 的函数原型。需要在 stm32f10x_it.c 文件中包含该头文件。 总之,这三个文件是 STM32F10x 系列单片机中断处理的关键文件,需要仔细配置和实现。 ### 回答2: stm32f10x_conf.h、stm32f10x_it.c和stm32f10x_it.h都是针对ST公司的STM32F10x系列微控制器的配置和中断处理的文件。 首先,stm32f10x_conf.h是一个配置文件,用于配置STM32F10x系列微控制器硬件资源的初始化设置。该文件中包含了各种宏定义和配置选项,以便用户可以根据需要进行硬件资源的配置。例如,该文件可以配置GPIO引脚的初始化设置、USART串口通信的波特率等。 其次,stm32f10x_it.c是一个中断处理文件,用于处理STM32F10x系列微控制器的中断事件。该文件中包含了各种中断服务函数(Interrupt Service Routine,简称ISR),当出现相应的中断事件时,相应的ISR将会被自动调用。用户可以根据自己的需求,在stm32f10x_it.c文件中编写相应的ISR,以执行所需的任务。例如,当出现USART接收中断时,用户可以编写相应的ISR用于处理接收到的数据。 最后,stm32f10x_it.h是一个中断处理的头文件,用于声明STM32F10x系列微控制器中使用的中断函数。用户可以根据自己的需求,在该文件中进行中断函数的声明。通常情况下,该文件会包含stm32f10x_conf.h文件,以便获取相关配置信息。 综上所述,stm32f10x_conf.h、stm32f10x_it.c和stm32f10x_it.h是针对STM32F10x系列微控制器的配置和中断处理的文件,用于配置硬件资源的初始化和处理中断事件。通过这些文件的使用,可以有效地管理STM32F10x系列微控制器的硬件资源并实现相应的功能。 ### 回答3: stm32f10x_conf.h是STM32F10x系列的配置文件,这个文件定义了STM32F10x器件的所有寄存器和外设的基本配置信息。在该文件中,我们可以根据需要选择要使用的外设和配置其相关参数,例如时钟配置、中断向量表配置等。通过修改这个文件中的宏定义和其他配置选项,我们可以对STM32F10x进行定制化的配置。 stm32f10x_it.c和stm32f10x_it.h是处理中断的文件。stm32f10x_it.c文件包含了处理各种中断的函数,而stm32f10x_it.h文件则是它的头文件,用于声明这些中断函数。这些文件是由STM32标准外设库提的,它们定义了中断函数的框架,并提了中断处理的一些常用函数和数据结构。 在使用STM32F10x系列的MCU进行开发时,我们通常需要根据需求来处理一些特定的中断,例如定时器中断、串口中断等。我们可以在stm32f10x_it.c中编写这些中断函数的具体实现,并在stm32f10x_it.h中进行声明。然后,在主程序中,我们可以根据需要直接调用这些中断函数。 这些文件的提给我们开发STM32F10x系列的MCU带来了很大的便利性。通过配置stm32f10x_conf.h文件,我们可以轻松地选择和配置所需的外设,并在stm32f10x_it.c文件中编写和处理中断函数,实现各种功能的逻辑。 总之,stm32f10x_conf.h、stm32f10x_it.c和stm32f10x_it.h是STM32F10x系列MCU开发中的重要文件,它们提了配置外设和处理中断的框架和函数,方便开发者进行STM32F10x系列MCU的开发工作。

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