修改设备树
zynqmp.dtsi
sdhc0: sdhc@ff160000
{
compatible = "zynq,sdhc";
reg = <0x0 0xff160000 0x0 0x1000>;
clocks = <&sdio0_ref_div_clk>;
interrupts = <80 0 4>; /* sd0 card interrupt */
interrupt-parent = <&intc>;
pinmux-0 = <&sdio0_mux>; /* sd0 pinmux */
embedded = <0>;
bus-width = <4>;
max-dev-clock-frequency = <52000000>;
card-status-check = <1>; /* 1:check card status 0:not check card status */
iommus = <&smmu 0x870>;
status = "okay"; /* set "okay" to enable */
};
sdhc1: sdhc@ff170000
{
compatible = "zynq,sdhc";
reg = <0x0 0xff170000 0x0 0x1000>;
clocks = <&sdio1_ref_div_clk>;
interrupts = <81 0 4>; /* SD1 card interrupt */
interrupt-parent = <&intc>;
embedded = <0>;
bus-width = <4>;
max-dev-clock-frequency = <52000000>;
card-status-check = <1>; /* 1:check card status 0:not check card status */
iommus = <&smmu 0x871>;
status = "okay"; /* set "okay" to enable */
};
zynqmp-iomux.dtsi
sdio0_mux: sdio0_mux
{
pin-set = <
13 0x08ffffff /* SDIO0_DAT0 */
14 0x08ffffff /* SDIO0_DAT1 */
15 0x08ffffff /* SDIO0_DAT2 */
16 0x08ffffff /* SDIO0_DAT3 */
17 0x08ffffff /* SDIO0_DAT4 */
18 0x08ffffff /* SDIO0_DAT5 */
19 0x08ffffff /* SDIO0_DAT6 */
20 0x08ffffff /* SDIO0_DAT7 */
21 0x08ffffff /* SDIO0_CMD */
22 0x08ffffff /* SDIO0_CLK */
23 0x08ffffff /* SDIO0_BUS */
>;
};
xlnx-zcu102-rev-1.1.dts
&sdhc0
{
status = "okay";
};
工程配置文件
添加
#DRV_FSL_SDHC_CTRL
#DRV_ZYNQ_SDHC_CTRL
#INCLUDE_SD_BUS
#DRV_SDSTORAGE_CARD
#DRV_MMCSTORAGE_CARD
#INCLUDE_DOSFS
编译后,加载uVxWorks,xlnx-zcu102-rev-1.1.dtb
启动后,
-> devs
drv refs name
1 [ 3] /
7 [ 3] /mmc0
0 [ 3] /null
6 [ 3] /sd1
3 [ 3] /ttyS0
2 [ 3] /tyCo/0 ==> /ttyS0
4 [ 3] /vxbus
12 [ 3] host:
value = -140737487584944 = 0xffff8000000bc150
-> ll "/sd1"
Listing Directory /sd1:
drwxrwxrwx 1 0 0 16384 Jul 19 2021 System Volume Information/
-rwxrwxrwx 1 0 0 5915456 Jul 20 2021 uVxWorks
-rwxrwxrwx 1 0 0 40 Jan 13 2021 README.TXT
-rwxrwxrwx 1 0 0 6649496 Jan 15 2021 BOOT.BIN
-rwxrwxrwx 1 0 0 19809 Jul 20 2021 XLNX.DTB
value = 0 = 0x0
->