对仿真glbl.v文件的理解

 

Simulation, UniSim, SimPrim - How do I use the "glbl.v" module in a Verilog simulation?

Description

How do I use the "glbl.v" module in a Verilog simulation?

Solution

The "glbl.v" module connects the Global Set/Reset and Global Tristate signals to the design. In order to properly reset the design in a Verilog simulation, the "glbl.v" module must be compiled and loaded along with the design. The "glbl.v" module is located at "$XILINX/verilog/src/glbl.v".

 

Using 6.1i design tools and later

In the 6.1i design tools, the "glbl.v" module was modified to automatically pulse GSR (FPGA Global Set/Reset) and PRLD (CPLD Global Set/Reset) for the first 100 ns of simulation. Code was also added to automatically pulse Global Tristate (GTS), but the default pulse is 0 ns.

 

For exact commands on how to compile and load the "glbl.v" in ModelSim, see the following solutions:

(Xilinx Answer 1078) - Behavioral Simulation

(Xilinx Answer 10177) - Post-PAR Timing Simulation

 

For additional information, reference the Synthesis and Simulation Design Guide:

http://toolbox.xilinx.com/docsan/xilinx6/books/docs/sim/sim