芯片数字设计
亮锅锅来啦
一直从事数字芯片设计5年,非常熟悉XCVU108,VU13P,VU19P大型的FPGA的资源和设计,FPGA高级工程师。
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git diff的使用_diff的顺序问题
git diff的使用 git diff的顺序问题原创 2024-07-11 11:20:20 · 273 阅读 · 0 评论 -
Vivado报错-2 [place 30-484] The packing of LUTRAM/SRL instance
Vivado报错[place 30-484] The packing of LUTRAM/SRL instance into capable slices could not be原创 2023-01-05 14:43:18 · 2460 阅读 · 5 评论 -
Vivado报错-1 [Opt 31 - 305] Invalid connectivity on net RESETN connected to port RESETN
synplify vivado[Opt 31 - 305] Invalid connectivity on net RESETN connected to port RESETN. It drives some load that need a buffer,and other loads that do not need a buffer. This configuration cannot be placed.原创 2022-07-08 17:05:06 · 2626 阅读 · 0 评论 -
Synaplify综合Removing
用Synaplify综合的时候出现Removing sequential instance原创 2022-11-05 15:52:25 · 678 阅读 · 0 评论 -
Synaplify综合报错Signal 011 error in m_xilinx
Synplify综合internal Error in m_xilinx Stack trace原创 2022-11-05 15:49:13 · 1409 阅读 · 2 评论