1、RAM的设计
1、1双端口RAM的设计(16X8:深度为16,宽度为8bit)
代码如下
mudule(
input w_clock,
input r_clock,
input w_allow,
input r_allow,
input [3:0] w_addr,
input [3:0] r_addr,
input [7:0] w_data,
output [7:0] r_data
);
reg [7:0] r_data;
reg [7:0] memory [15:0];
always @ (posedge w_clock) begin
if(w_allow)
memory[w_addr] <= w_data;
end
always @ (posedge r_clock) begin
if(r_allow)
r_data <= memory[r_addr];
end
endmodule